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Embedded Systems Glossary

The terms that matter most in embedded systems development, with real-world context from EmbeddedRelated's forums and blogs.

195 terms | The glossary grows by about 5 new entries per day.

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Protocols
33 terms
Buses
9 terms
Peripherals
10 terms
RTOS
22 terms
Memory
23 terms
Power
14 terms
Electrical
28 terms
Standards
13 terms
Tools
19 terms
Architecture
23 terms
Security
1 term

All terms (A-Z)

# A B C D E F G H I J L M N O P Q R S T U V W Z
#
  • 1-Wire [protocols] 1-Wire is a single-master, multi-drop serial bus developed by Dallas Semiconductor (now Maxim Integrated, acquired by Analog Devices) that c...
A
  • A/D [peripherals] An analog-to-digital converter (A/D or ADC) is a peripheral that samples a continuous analog voltage and converts it to a discrete digital v...
  • ACK [protocols] An ACK (acknowledge) is a control signal or message sent by a receiver to confirm that data has been successfully received. It is a fundamen...
  • ADC [peripherals] An analog-to-digital converter (ADC) is a peripheral that samples a continuous analog voltage and converts it to a discrete digital value pr...
  • Address Bus [buses] The address bus is a set of signal lines, or in modern systems an address phase within a bus protocol or internal fabric, used by a processo...
  • AHB [buses] AHB (Advanced High-performance Bus) is a high-speed, pipelined on-chip bus from ARM's AMBA specification, designed to connect processors, me...
  • AMBA [buses] AMBA (Advanced Microcontroller Bus Architecture) is a freely available, on-chip interconnect specification from ARM that defines how process...
  • APB [buses] APB (Advanced Peripheral Bus) is a low-speed, low-power bus in ARM's AMBA bus architecture, designed to connect peripheral devices such as U...
  • ARP [protocols] Address Resolution Protocol (ARP) is a network protocol used to map a known IPv4 address to a MAC (hardware) address on a local Ethernet or ...
  • ASCII [standards]
  • Assembly Language [tools] Assembly language (ASM) is a low-level programming language in which each statement typically corresponds directly to one machine instructio...
  • Atomic Operation [architecture] An atomic operation is one that completes entirely or not at all, with no observable intermediate state visible to any other execution conte...
  • AXI [buses] AXI (Advanced eXtensible Interface) is a high-performance, point-to-point on-chip bus protocol defined by ARM as part of the AMBA specificat...
B
  • Baud Rate [protocols]
  • BCD [standards] Binary-Coded Decimal (BCD) is a numeric encoding in which each decimal digit (0-9) is stored as its own 4-bit binary value, rather than enco...
  • BGA [electrical] A ball grid array (BGA) is a surface-mount IC package in which solder balls arranged in a grid on the underside of the package form the elec...
  • Big Endian [architecture] Big-endian is a byte-ordering convention in which the most significant byte (MSB) of a multi-byte value is stored at the lowest memory addre...
  • BIOS [tools] The Basic Input/Output System (BIOS) is firmware stored in non-volatile memory on a PC-class motherboard that initializes hardware at power-...
  • Bitmask [architecture] A bitmask is an integer value in which individual bits, or groups of bits, are used to select, set, clear, or test specific bits within anot...
  • BJT [electrical]
  • BLE [protocols] BLE (Bluetooth Low Energy), also called Bluetooth LE, is a short-range wireless protocol in the Bluetooth 4.0+ specification designed for lo...
  • Boost Converter [power] A boost converter is a switched-mode DC-DC power supply topology that produces an output voltage higher than its input voltage. It uses an i...
  • Bootloader [tools] A bootloader is a small program that runs immediately after reset, before the main application, and is responsible for initializing minimal ...
  • BRAM [memory] Block RAM (BRAM) is dedicated, on-chip synchronous RAM embedded directly in FPGA fabric, implemented as hard memory macros rather than as lo...
  • Brown-out Reset [power] A brown-out reset (BOR) is a hardware supervisory function that holds a microcontroller or SoC in reset when the supply voltage drops below ...
  • Buck Converter [power] A buck converter (also called a step-down converter) is a switching DC-DC power supply topology that produces an output voltage lower than i...
  • Buck-Boost Converter [power] A buck-boost converter is a DC-DC switching power supply topology that can produce an output voltage either lower or higher than its input v...
  • Bypass Capacitor [power] A bypass capacitor (also called a decoupling capacitor) is a capacitor placed between a power-supply rail and ground, physically close to a ...
C
  • C99 [standards] C99 is the widely used shorthand for the ISO/IEC 9899:1999 revision of the C programming language standard, which added fixed-width integer ...
  • cache line [memory] A cache line is the smallest unit of data transferred between main memory and a cache. Rather than fetching individual bytes or words, the c...
  • Cache Memory [memory] Cache memory is a small, fast memory layer placed between a processor and slower main memory (Flash or DRAM) that transparently stores recen...
  • Callback [rtos]
  • CAN Bus [protocols] CAN (Controller Area Network) is a multi-master, differential serial bus protocol originally developed by Bosch for automotive applications,...
  • Capacitor [electrical]
  • Checksum [standards] A checksum is a value computed from a block of data and appended to it so that a receiver or reader can verify data integrity by recomputing...
  • CISC [architecture] CISC (Complex Instruction Set Computer) is a processor architecture philosophy in which the CPU supports a large number of instructions, man...
  • CMake [tools] CMake is an open-source, cross-platform build system generator that produces native build files (such as Makefiles, Ninja build files, or ID...
  • CoAP [protocols] CoAP (Constrained Application Protocol) is a lightweight request/response protocol designed for use on resource-constrained nodes and lossy ...
  • Codec [electrical] A codec (coder-decoder) is a hardware block, software library, or combination of both that encodes raw data into a compressed or formatted b...
  • Context Switch [rtos] A context switch is the act of saving the CPU state of a currently running task (or thread) and restoring the previously saved state of anot...
  • CPLD [architecture] A CPLD (Complex Programmable Logic Device) is a category of reconfigurable digital logic IC that uses an array of macrocells connected throu...
  • CRC [standards] A cyclic redundancy check (CRC) is an error-detection scheme that treats a block of data as a polynomial, divides it by a fixed generator po...
  • Critical Section [rtos] A critical section is a region of code that must execute with mutual exclusion with respect to other concurrent activities that share the sa...
  • Cross-Compiler [tools] A cross-compiler is a compiler that runs on one architecture or operating system (the host) and produces executable code for a different arc...
  • Crystal Oscillator [electrical] A crystal oscillator is an electronic oscillator that uses the mechanical resonance of a piezoelectric crystal (typically quartz) to generat...
D
  • DAC [peripherals] A digital-to-analog converter (DAC) is a peripheral that converts a digital numeric value into a proportional analog voltage (or, less commo...
  • Data Bus [buses] A data bus is a set of parallel signal lines that transfer data between two or more components in a system, such as a CPU, memory, and perip...
  • DDR [memory] DDR SDRAM (Double Data Rate Synchronous Dynamic Random-Access Memory) is a type of volatile DRAM that transfers data on both the rising and ...
  • Deadlock [rtos] A deadlock is a situation in which two or more tasks are each waiting for a resource held by another, such that none can proceed and all rem...
  • Debugger [tools] A debugger is a tool that lets a developer inspect and control the execution of a program running on a target processor, typically by settin...
  • Decoupling Capacitor [power] A decoupling capacitor (also called a bypass capacitor) is a capacitor placed between a power supply rail and ground, close to an IC's power...
  • DHCP [protocols] DHCP (Dynamic Host Configuration Protocol) is a network protocol that automatically assigns IP addresses and related configuration parameter...
  • Diode [electrical] A diode is a two-terminal semiconductor device that allows current to flow readily in one direction (forward bias) while blocking it in the ...
  • DMA [peripherals] Direct Memory Access (DMA) is a hardware controller that transfers data between memory regions or between memory and a peripheral without co...
  • DRAM [memory] DRAM (Dynamic Random-Access Memory) is a type of volatile semiconductor memory that stores each bit in a one-transistor, one-capacitor cell,...
  • DSP [architecture] A digital signal processor (DSP) is a processor architecture optimized for repetitive, numerically intensive operations on sampled data stre...
  • DVI [protocols] DVI (Digital Visual Interface) is a video display interface standard developed by the Digital Display Working Group (DDWG) in 1999, designed...
E
  • EEPROM [memory] EEPROM (Electrically Erasable Programmable Read-Only Memory) is a non-volatile memory technology that retains stored data without power and ...
  • elf [tools] ELF (Executable and Linkable Format) is a standard binary file format used to store compiled object files, shared libraries, and executable ...
  • embedded flash [memory] Embedded flash is non-volatile memory fabricated on the same die as the processor or microcontroller, used to store firmware, constants, and...
  • EMI [electrical] Electromagnetic interference (EMI) is unwanted electrical noise radiated or conducted by one circuit or device that degrades the performance...
  • Encoder [peripherals] An encoder is a sensor or peripheral that converts mechanical position or motion (rotary or linear) into an electrical signal, typically as ...
  • Endianness [architecture] Endianness (also called byte order) describes the order in which the bytes of a multi-byte value are stored in memory or represented in a da...
  • EPROM [memory] EPROM (Erasable Programmable Read-Only Memory) is a non-volatile memory technology that can be programmed by applying high voltage pulses to...
  • ESD [electrical] Electrostatic discharge (ESD) is the sudden transfer of electric charge between two objects at different electrostatic potentials, typically...
  • Ethernet [protocols] Ethernet is a family of wired networking standards (IEEE 802.3) that define the physical layer signaling, frame format, and media access rul...
F
  • FIFO [memory] A FIFO (first-in first-out queue) is a data structure or hardware peripheral in which data is read out in exactly the order it was written: ...
  • Finite State Machine [architecture] A finite state machine (FSM) is a computational model in which a system exists in exactly one of a finite number of defined states at any gi...
  • Fixed Point [architecture] Fixed-point arithmetic is a method of representing fractional numbers using integers, where a scaling factor (the position of an implied bin...
  • Flash Memory [memory] Flash memory is a type of non-volatile, electrically erasable, solid-state storage that retains its contents without power. In embedded syst...
  • FlexRay [protocols] FlexRay is a fault-tolerant serial communication protocol developed for automotive applications, offering time-triggered and event-triggered...
  • Floating Point [architecture] Floating-point is a numeric representation that encodes a value as a sign, a significand (mantissa), and an exponent, allowing the decimal p...
  • FPGA [architecture] An FPGA (field-programmable gate array) is an integrated circuit containing a large array of configurable logic blocks, programmable interco...
  • FPU [architecture] A floating-point unit (FPU) is a hardware block that executes IEEE 754 floating-point arithmetic operations -- addition, subtraction, multip...
  • frame buffer [memory] A frame buffer is a region of memory that holds the pixel data for a complete display frame, with each location in the buffer corresponding ...
  • FreeRTOS [rtos] FreeRTOS is an open-source, real-time operating system kernel widely used in embedded systems, providing preemptive multitasking (with coope...
G
  • GCC [tools] GCC (GNU Compiler Collection) is a free, open-source compiler suite maintained by the GNU Project that supports multiple programming languag...
  • GDB [tools] GDB (GNU Debugger) is an open-source, command-line debugger that lets you inspect and control the execution of a program, including setting ...
  • GPIO [peripherals] GPIO (general-purpose input/output) is a digital pin on a microcontroller or SoC whose direction (input or output) and state (high or low) a...
  • Gray Code [standards] Gray code is a binary numbering scheme in which consecutive values differ by exactly one bit -- a property that holds for the standard refle...
H
  • Harvard Architecture [architecture] Harvard architecture is a processor design in which instruction memory and data memory occupy separate address spaces and are accessed over ...
  • HDLC [protocols] HDLC (High-Level Data Link Control) is a bit-oriented, synchronous data link layer protocol standardized by ISO (ISO 13239 / ISO/IEC 13239) ...
  • Heap [memory] The heap is a region of memory used for dynamic allocation, where blocks of memory are requested and released explicitly at runtime via func...
  • Heap Fragmentation [memory] Heap fragmentation is the condition in which available free memory on the heap is divided into many small, non-contiguous blocks, so that th...
  • Hysteresis [electrical]
I
  • I2S [protocols] I2S (Inter-IC Sound) is a synchronous serial bus protocol developed by Philips (now NXP) specifically for transferring digital audio data be...
  • I²C [protocols]
  • Icc [electrical] Icc (supply current, often associated with the Vcc pin name) is the quiescent or operating current drawn by a device from its positive suppl...
  • IEEE 754 [standards] IEEE 754 is the dominant standard defining formats and rounding rules for binary (and decimal) floating-point arithmetic, covering 32-bit si...
  • Inductor [electrical]
  • Interrupt [rtos] An interrupt is a hardware or software signal that causes the processor to suspend its current execution context, save some or all state (th...
J
  • JTAG [tools] JTAG (Joint Test Action Group) is a standardized interface (IEEE 1149.1) originally designed for boundary-scan testing of PCBs, and widely a...
L
  • Latency [rtos] In RTOS and embedded systems contexts, latency is the elapsed time between a triggering event and the system's first observable response to ...
  • LDO Regulator [power] A low-dropout (LDO) regulator is a linear voltage regulator that maintains a stable output voltage while operating with a very small differe...
  • Level Shifter [electrical] A level shifter is a circuit that translates digital (or sometimes analog) signals between two voltage domains, allowing devices that operat...
  • LIN Bus [protocols] LIN (Local Interconnect Network) is a low-cost, single-wire serial communication protocol designed for short-distance, low-bandwidth communi...
  • Linear Regulator [power] A linear regulator is a voltage regulator that controls output voltage by continuously adjusting the impedance of a pass element (typically ...
  • Linker [tools] A linker is a build tool that combines one or more compiled object files and static libraries into a single executable binary, resolving sym...
  • Little Endian [architecture] Little-endian is a byte-ordering convention in which a multi-byte value is stored in memory with its least-significant byte (LSB) at the low...
  • Logic Analyzer [tools] A logic analyzer is a test instrument that captures and displays the digital state (high/low) of multiple signal lines simultaneously over t...
  • LoRa [protocols] LoRa (Long Range) is a proprietary chirp spread-spectrum (CSS) physical-layer modulation developed by Semtech, designed for low-power, long-...
  • Low-Power Mode [power] A low-power mode is a reduced-activity operating state in which a microcontroller or SoC disables or slows some combination of its CPU, peri...
M
  • MAC Address [protocols] A MAC (Media Access Control) address is a 48-bit identifier assigned to a network interface controller (NIC) to identify it on a local netwo...
  • Makefile [tools] A Makefile is a text file that instructs the `make` build utility how to compile, link, and otherwise process a project's source files by de...
  • MCU [architecture] A microcontroller (MCU) is a single integrated circuit that combines a CPU core, on-chip flash or ROM for program storage, RAM, and a collec...
  • Memory Leak [memory] A memory leak occurs when dynamically allocated memory is no longer reachable by the program but has not been freed, causing the allocator t...
  • Memory-Mapped I/O [memory] Memory-mapped I/O (MMIO) is a technique in which peripheral registers and other hardware resources are placed at specific addresses within t...
  • Message Queue [rtos] A message queue is a synchronization and communication primitive that lets tasks, ISRs, and processes exchange discrete data items through a...
  • MII [protocols] MII (Media Independent Interface) is a standardized parallel interface defined in IEEE 802.3 that connects an Ethernet MAC (Medium Access Co...
  • MISRA C [standards] MISRA C is a set of coding guidelines for the C language published by the Motor Industry Software Reliability Association (MISRA), designed ...
  • MMU [memory] A Memory Management Unit (MMU) is a hardware block that translates virtual addresses generated by the CPU into physical addresses in memory,...
  • Modbus [buses] Modbus is an open communication protocol originally developed by Modicon in 1979 for communication between programmable logic controllers (P...
  • MOSFET [electrical] A MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled semiconductor switch or amplifier in which a gate volta...
  • MQTT [protocols] MQTT (Message Queuing Telemetry Transport) is a lightweight publish-subscribe messaging protocol designed for constrained devices and low-ba...
  • Mutex [rtos] A mutex (mutual exclusion object) is a synchronization primitive that allows at most one task or thread to hold it at a time, protecting a s...
N
  • NAND Flash [memory] NAND Flash is a type of non-volatile solid-state storage organized in pages and blocks, where cells are erased in large blocks and written i...
  • Nested Interrupts [rtos] Nested interrupts occur when a higher-priority interrupt preempts an ISR that is already executing, causing the processor to suspend the cur...
  • NOR Flash [memory] NOR Flash is a non-volatile solid-state memory technology where individual words or bytes can be read randomly at full bus speed, and where ...
  • NVIC [architecture] The Nested Vectored Interrupt Controller (NVIC) is a hardware interrupt controller integrated into ARM Cortex-M processors that manages exce...
O
  • Ohm's Law [electrical]
  • Op-Amp [electrical] An operational amplifier (op-amp) is a high-gain differential voltage amplifier -- most commonly realized as an IC, though discrete implemen...
  • Open Drain [electrical] An open-drain (or open-collector in bipolar transistor terminology) output is a driver topology in which the output transistor can only pull...
  • OpenOCD [tools] OpenOCD (Open On-Chip Debugger) is an open-source tool that provides on-chip debugging, in-system programming, and boundary-scan testing for...
P
  • Parity Bit [standards] A parity bit is a single bit appended to a group of data bits whose value is set to make the total number of 1-bits in the group either alwa...
  • PCI Express [buses] PCI Express (PCIe) is a high-speed serial point-to-point interconnect standard used to connect processors, FPGAs, GPUs, storage controllers,...
  • PID Controller [architecture] A PID controller is a closed-loop feedback algorithm that computes a corrective output by summing three terms: a proportional term (scaled d...
  • PLL [architecture] A phase-locked loop (PLL) is a feedback control circuit that locks the phase and frequency of an output signal to a reference signal, typica...
  • POSIX [standards] POSIX (Portable Operating System Interface) is a family of IEEE standards (IEEE 1003.x) that defines a common API for operating system servi...
  • Power-on Reset [power] A Power-on Reset (POR) is a hardware circuit that holds a microcontroller or SoC in reset until the supply voltage has risen to a level at w...
  • PPP [protocols] Point-to-Point Protocol (PPP) is a data link layer protocol (RFC 1661) that frames and negotiates link-layer encapsulation over a serial lin...
  • Preemption [rtos]
  • Priority Inheritance [rtos] Priority inheritance is a mutex protocol in which a low-priority task temporarily receives the priority of the highest-priority task blocked...
  • Priority Inversion [rtos] Priority inversion is a scheduling anomaly in which a high-priority task is indirectly blocked by a lower-priority task, because an intermed...
  • Profibus [protocols] PROFIBUS (commonly expanded as Process Field Bus) is a standardized fieldbus communication protocol defined in IEC 61158 and IEC 61784, desi...
  • Pull-down Resistor [electrical] A pull-down resistor is a resistor connected between a signal line and ground (VSS) to establish a defined low logic level when no active dr...
  • Pull-up Resistor [electrical] A pull-up resistor is a resistor connected between a signal line and a positive supply voltage (VCC or similar) that passively drives the li...
  • Push-Pull [electrical] A push-pull output stage uses two complementary switching elements (typically one high-side and one low-side transistor or MOSFET) to active...
  • PWM [peripherals] Pulse-width modulation (PWM) is a technique for encoding a variable analog-equivalent level as a fixed-frequency digital signal by varying t...
Q
  • QSPI [buses]
  • Quiescent Current [power] Quiescent current (often abbreviated I_Q or I_q) is the current drawn by a circuit or device when it is in a stable, non-switching operating...
R
  • Race Condition [rtos] A race condition is a defect in which the correctness of a program depends on the relative timing or interleaving of two or more concurrent ...
  • RAM [memory] RAM (Random Access Memory) is a form of volatile storage where any location can be read or written in roughly equal time regardless of its a...
  • Rate Monotonic Scheduling [rtos] Rate Monotonic Scheduling (RMS) is a fixed-priority preemptive scheduling algorithm for periodic real-time tasks in which each task is assig...
  • Reentrancy [rtos]
  • Registers [architecture] Registers are small, fixed-width storage locations built directly into a processor or peripheral, typically accessible in a single clock cyc...
  • RF [electrical] Radio frequency (RF) refers to electromagnetic oscillations in the frequency range roughly from 3 kHz to 300 GHz (boundaries vary by convent...
  • RISC [architecture] RISC (Reduced Instruction Set Computer) is a processor architecture philosophy that favors a small set of simple instructions, typically fix...
  • rootfs [tools] The root filesystem (rootfs) is the top-level filesystem mounted at '/' during Linux boot, containing the directory tree, libraries, binarie...
  • Round-Robin Scheduling [rtos] Round-robin scheduling is a CPU scheduling policy in which each ready task is given a fixed time slice (quantum) in turn, cycling through al...
  • RS-232 [protocols] RS-232 is a serial communication standard that defines electrical signal levels, connector pinouts, and handshaking lines for point-to-point...
  • RS-485 [protocols] RS-485 (also written RS485, formally TIA-485) is a differential, multi-drop serial bus standard that defines the electrical layer for half- ...
  • RTC [peripherals] A real-time clock (RTC) is a dedicated peripheral or external IC that tracks calendar time (seconds, minutes, hours, date, day, month, year)...
S
  • Scheduler [rtos] A scheduler is the component of an RTOS (or bare-metal framework) responsible for deciding which task or thread runs on the CPU at any given...
  • Schmitt Trigger [electrical] A Schmitt trigger is a comparator circuit with hysteresis: it has two distinct switching thresholds, one for rising input signals and one fo...
  • Schottky Diode [electrical] A Schottky diode is a semiconductor diode formed by a metal-semiconductor junction rather than a p-n junction, resulting in a lower forward ...
  • SDRAM [memory] SDRAM (Synchronous Dynamic RAM) is a type of volatile DRAM that synchronizes its internal operations to an external clock signal, allowing t...
  • Semaphore [rtos] A semaphore is a synchronization primitive that uses an integer counter to control access to shared resources or to signal events between ta...
  • Semihosting [tools] Semihosting is a mechanism that allows code running on an embedded target (or simulator) to make host-machine I/O calls -- such as file read...
  • Sleep Mode [power] A sleep mode is a low-power state in which a microcontroller or processor halts some or all of its clocks and disables selected peripherals ...
  • Slew Rate [electrical]
  • SMBus [protocols] SMBus (System Management Bus) is a two-wire serial communication protocol derived from I2C, defined by Intel in 1995 and maintained by the S...
  • SNMP [protocols] SNMP (Simple Network Management Protocol) is a UDP-based application-layer protocol used to monitor and manage networked devices by reading ...
  • SPI [protocols] Serial Peripheral Interface (SPI) is a synchronous, full-duplex, master-slave communication protocol used for short-distance data exchange b...
  • Spinlock [rtos] A spinlock is a synchronization primitive in which a thread or task repeatedly polls a lock variable in a tight loop ("spins") until the loc...
  • SRAM [memory] SRAM (Static Random-Access Memory) is a type of volatile memory that stores each bit in a flip-flop circuit, retaining its value as long as ...
  • Stack (Memory) [memory] A stack is a region of RAM used for automatic storage of local variables, function return addresses, and processor register states, operatin...
  • Stack Overflow [rtos] A stack overflow occurs when a program writes beyond the allocated bounds of its call stack, typically by consuming more stack space than wa...
  • Static Analysis [tools] Static analysis is the automated examination of source code (or compiled artifacts such as object files or bytecode) for defects, policy vio...
  • SWD [tools] Serial Wire Debug (SWD) is a two-wire debug and programming interface defined by ARM as part of the CoreSight debug architecture, used to ac...
  • Switching Regulator [power]
T
  • TCP/IP [protocols] TCP/IP is a suite of networking protocols that defines how data is addressed, routed, and reliably delivered across interconnected networks....
  • TLS [security] TLS (Transport Layer Security) is a cryptographic protocol that provides encrypted communication over a network connection, typically with e...
  • Toolchain [tools] A toolchain is the ordered set of programs that transforms source code into a binary image or other output artifact (such as a relocatable l...
  • Transistor [electrical] A transistor is a semiconductor device, typically with three terminals, that uses a signal at one terminal to control a larger current flowi...
  • Two's Complement [standards] Two's complement is a binary number representation in which negative integers are encoded by inverting all bits of the corresponding positiv...
U
  • UART [protocols] A UART (Universal Asynchronous Receiver-Transmitter) is a hardware peripheral that serializes and deserializes data over two wires (TX and R...
  • UARTs [protocols] A UART (Universal Asynchronous Receiver/Transmitter) is a hardware peripheral that serializes and deserializes data over two wires (TX and R...
  • UDP [protocols] UDP (User Datagram Protocol) is a connectionless, unreliable transport-layer protocol in the IP suite that sends discrete packets called dat...
  • ULPI [standards] ULPI (UTMI+ Low Pin Interface) is a standardized interface that connects a USB controller (host or device) to an external USB PHY over an 8-...
  • USART [peripherals] A USART (Universal Synchronous/Asynchronous Receiver-Transmitter) is a serial communication peripheral that supports both asynchronous opera...
  • USB [protocols] USB (Universal Serial Bus) is a host-centric, hierarchical serial bus standard originally designed to replace the tangle of legacy PC periph...
  • USB CDC [protocols] USB CDC (Communications Device Class) is a USB device class specification that defines a family of communication interfaces for USB devices....
  • UTF-8 [standards] UTF-8 is a variable-width character encoding that represents Unicode code points using one to four bytes, with ASCII characters (U+0000 to U...
V
  • Vcc [electrical] Vcc is the positive supply voltage rail for a circuit, historically denoting the collector supply voltage in bipolar (BJT) transistor design...
  • Vector Table [architecture] A vector table is a region of memory containing a list of addresses (vectors) that the processor jumps to when handling exceptions or interr...
  • volatile (keyword) [architecture] In C and C++, `volatile` is a type qualifier that tells the compiler a variable's value may change at any time outside the normal flow of th...
  • Voltage Divider [electrical] A voltage divider is a passive circuit consisting of two or more impedances connected in series, where the output voltage is taken across on...
  • Voltage Regulator [power] A voltage regulator is a circuit or integrated device that maintains a stable output voltage regardless of variations in input voltage or lo...
  • Von Neumann Architecture [architecture] Von Neumann architecture is a computer design model in which program instructions and data share the same memory space and are accessed over...
  • Vref [electrical] Vref (voltage reference) is a stable, accurate DC voltage used as a known baseline against which other voltages are measured or converted. I...
W
  • Watchdog Timer [peripherals] A watchdog timer (WDT) is a hardware countdown timer that resets the microcontroller if the firmware fails to periodically "kick" (reload) i...
  • Wear Leveling [memory] Wear leveling is a set of techniques used in flash memory management to distribute write and erase operations as evenly as possible across a...
  • Worst-Case Execution Time [rtos] Worst-Case Execution Time (WCET) is the longest time a given piece of code can take to complete across all possible inputs, data states, and...
Z
  • Zener Diode [electrical] A Zener diode is a two-terminal semiconductor device designed to conduct in reverse breakdown at a nominally stable voltage (the Zener volta...
  • Zigbee [protocols] Zigbee is a low-power, low-data-rate wireless mesh networking standard built on the IEEE 802.15.4 physical and MAC layers, operating in the ...