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BGA

Category: Electrical | Also known as: ball grid array

A ball grid array (BGA) is a surface-mount IC package in which solder balls arranged in a grid on the underside of the package form the electrical connections to the PCB, rather than perimeter leads. BGAs are commonly used for high pin-count devices such as FPGAs, SoCs, DDR memory, and networking ICs.

In practice

BGA packages allow a much higher connection density than leaded packages such as QFP or SOIC. A mid-range FPGA like the Xilinx Artix-7 in a 484-ball FBG484 package, or an NXP i.MX RT1064 in a 196-ball BGA, would be impractical or physically impossible to route in a perimeter-lead format at the same die size. For embedded developers moving from simple MCUs to application processors or FPGAs, BGA parts are often unavoidable.

Soldering BGA packages requires either reflow oven or vapor-phase assembly with precise paste stenciling. X-ray inspection is a common method for verifying joint quality, since the solder connections are hidden beneath the package body; boundary-scan, electrical test, and process controls are also used, as X-ray can detect many defects but does not prove every joint is robust. This has direct implications for prototyping: hand-rework of a BGA is difficult and requires hot-air equipment and significant skill. Some BGA packages, particularly those with larger ball pitches (1.0 mm or greater) and fewer balls, are marketed as more rework-friendly, but fine-pitch BGAs (0.4 mm to 0.5 mm pitch) are extremely difficult to rework without a suitable rework station and controlled process, and are beyond the reach of ordinary hand-soldering tools.

PCB layout for BGA devices is one of the more demanding aspects of hardware bring-up. Escaping signals from the ball field typically requires multiple PCB layers and careful via strategy -- fan-out vias, blind vias, or via-in-pad (filled and plated) for the tightest pitches. Power delivery, decoupling capacitor placement, and controlled-impedance routing all become harder to achieve simultaneously when routing under and around a BGA.

A practical pitfall for teams new to BGA design is underestimating PCB stackup requirements. A 0.5 mm pitch BGA may require 6 to 8 or more layers to achieve full ball escape, depending on ball count, escape pattern, via type, and fab capabilities, though fewer layers can sometimes be achieved with advanced techniques. It may also require via-in-pad with epoxy fill and copper cap, which adds PCB cost. Thermal relief requirements for power balls and the need for proper solder mask defined (SMD) versus non-solder-mask-defined (NSMD) pad choices are also frequent sources of first-spin assembly issues.

Frequently asked

Can I prototype with a BGA part on a breadboard or through-hole adapter?
Not directly. BGA parts require PCB assembly with a reflow process. Adapter boards that break out BGA balls to a larger pitch or through-hole pins exist for some common packages, but they are expensive, add parasitics, and are not available for every device. For early prototyping, check whether the vendor offers the same silicon in a QFP or QFN alternative; many MCUs do, but high-density FPGAs and application processors often do not.
How do I verify BGA solder joint quality during assembly?
X-ray inspection (2D or 3D/CT) is the standard method, since the balls are not visible after reflow. Automated X-ray inspection (AXI) systems can detect bridging, missing balls, voiding, and cold joints. Visual inspection and even boundary-scan (JTAG) can confirm electrical connectivity but will not reveal a marginal joint that may fail later under thermal cycling.
What does ball pitch mean and why does it matter?
Ball pitch is the center-to-center distance between adjacent solder balls, typically stated in millimeters. Common pitches are 1.0 mm, 0.8 mm, 0.65 mm, 0.5 mm, and 0.4 mm. Finer pitch requires tighter PCB manufacturing tolerances, smaller vias, more PCB layers for escape routing, and more precise stencil printing -- all of which raise cost and reduce assembly yield if not managed carefully.
What is via-in-pad and when is it required for BGA routing?
Via-in-pad places a via directly within the SMT pad rather than adjacent to it. It is typically required when the ball pitch is too tight (often 0.5 mm or below) to fit a standard via in the space between pads. The via must be filled with epoxy and copper-capped by the PCB fabricator to prevent solder wicking into the via barrel during reflow, which adds cost. Skipping the fill step on via-in-pad designs is a common first-spin mistake that leads to solder-starved joints.
Do all BGA packages behave the same thermally?
No. Thermal performance varies with package construction (substrate material, die attach method, presence of an exposed thermal slug or lid), ball count, and board-level copper pours. Plastic BGA (PBGA) packages have different thermal resistance values than ceramic BGA (CBGA) or flip-chip BGA (FCBGA) variants. Always check the theta-JB (junction-to-board) and theta-JA values in the package datasheet and run thermal simulations or measurements for power-hungry parts like FPGAs and application processors.

Differentiators vs similar concepts

BGA is often compared to QFP (quad flat package) and QFN (quad flat no-lead). QFP uses perimeter gull-wing leads that are hand-solderable and visually inspectable, but tops out at a few hundred pins and has a larger PCB footprint for equivalent pin count. QFN uses a perimeter of flat pads on the package underside with an exposed thermal pad, offering better density than QFP and easier thermal management, but still limited to perimeter connections. BGA uniquely uses the entire package underside for connections, enabling the highest pin counts and smallest footprint per pin, at the cost of requiring reflow assembly and X-ray inspection. A related variant, the LGA (land grid array), replaces the solder balls with flat pads; the solder paste is applied to the PCB rather than the package, and it is used for some Intel/AMD processors and certain RF modules.