DVI (Digital Visual Interface) is a video display interface standard developed by the Digital Display Working Group (DDWG) in 1999, designed to transmit uncompressed digital video from a source to a display. It supports digital-only (DVI-D), analog-only (DVI-A), and combined digital/analog (DVI-I) signal configurations over a multi-pin connector.
In practice
DVI is encountered in embedded systems primarily when driving external monitors or flat-panel displays from an FPGA, SoC, or graphics-capable processor. On the digital side, DVI uses Transition Minimized Differential Signaling (TMDS) to serialize pixel data, which is the same TMDS encoding and physical signaling used by HDMI for video (though the two interfaces differ in other respects). This means that on many FPGA boards (such as Xilinx Spartan/Artix or Intel Cyclone families), a DVI transmitter can be implemented using TMDS-capable I/O banks along with a serializer block, sometimes without any dedicated DVI IP core. DVI-D single-link supports pixel clocks up to 165 MHz, accommodating resolutions up to 1920x1200 at 60 Hz; dual-link DVI doubles the bandwidth to cover higher resolutions.
A common embedded use case is generating DVI output directly from an FPGA using a TMDS encoder and serializer (either instantiated in FPGA fabric or provided by an external IC). Because DVI carries no audio and no content-protection signaling (unlike HDMI), it is simpler to implement in custom logic. Some designs use a small external TMDS serializer IC (such as the TI TFP410 or Analog Devices ADV7513 in DVI mode) to handle the electrical interface, reducing the I/O speed requirements on the FPGA fabric.
A frequent pitfall is conflating DVI's electrical requirements with generic LVDS. True TMDS has specific voltage swing and termination requirements that differ from generic LVDS standards; driving a DVI display with out-of-spec signal levels can produce intermittent lock failures or no image. Impedance-controlled routing at 100 ohm differential is important, and AC coupling capacitors on TMDS pairs are used in many DVI designs, though whether they are required depends on the specific implementation and transmitter datasheet.
When designing a PCB that carries DVI, the connector pinout must be verified carefully. DVI-I and DVI-D connectors look similar but are not fully interchangeable, and the analog pins in a DVI-I connector add routing complexity. Dual-link wiring requires twice as many TMDS pairs and is only necessary for resolutions above what single-link can support; most embedded applications target single-link DVI only.
Frequently asked
What is the difference between DVI-D, DVI-A, and DVI-I?
DVI-D carries digital-only TMDS signals. DVI-A carries analog VGA-compatible signals only. DVI-I carries both digital and analog signals on the same connector, allowing it to work with either display type using an appropriate adapter. Most modern embedded designs use DVI-D only, as analog support adds pin count and analog circuitry.
Can DVI and HDMI be used interchangeably with a simple passive adapter?
For the digital video signal, yes. DVI-D and HDMI share the same TMDS physical layer and video encoding, so a passive DVI-to-HDMI adapter works for video on displays that support both. However, DVI carries no audio, no HDCP content protection negotiation, and no CEC signaling, so those HDMI features will not function through such an adapter.
How is DVI typically implemented on an FPGA without a dedicated video SoC?
A common approach uses a serializer (either within the
FPGA using OSERDESE or ALTLVDS primitives, or an external TMDS serializer IC like the TI TFP410) to convert parallel pixel data from the FPGA fabric into TMDS serial streams. The FPGA generates horizontal and vertical sync, pixel clock, and RGB data; the
encoder maps each 8-bit color channel to a 10-bit TMDS code and serializes it at 10x the pixel clock rate. On Artix-7 and similar parts with 3.3 V-capable TMDS I/O standards, this can be done with minimal external components.
What resolutions and refresh rates does single-link DVI support?
Single-link DVI supports pixel clocks up to 165 MHz, which covers 1920x1200 at 60 Hz (WUXGA) and lower resolutions such as 1080p and 1280x1024. For higher resolutions such as 2560x1600, dual-link DVI is required, which uses two complete sets of TMDS links. Most embedded display applications target single-link resolutions.
Does DVI support hot-plug detection and EDID?
Yes. DVI includes a hot-plug detect (HPD) pin that the display drives high to signal its presence, and an
I2C-based DDC (Display Data Channel) interface over which the host can read the display's EDID data to discover supported resolutions and timings. In embedded designs, reading EDID is optional; many systems output a fixed known-compatible resolution and ignore EDID entirely, which is acceptable if the target display is known.
Differentiators vs similar concepts
DVI is frequently compared to HDMI and DisplayPort. DVI and HDMI share the same TMDS physical layer for video, making passive adapters viable for video-only use, but HDMI adds audio, CEC, ARC, and HDCP in the same cable and uses a smaller, latching connector. DisplayPort uses a packet-based protocol over a distinct physical layer based on AC-coupled differential pairs with its own encoding scheme (not LVDS-derived), supports higher bandwidths, and is designed for internal panel connections as well as external monitors; passive DVI-to-DisplayPort adapters are generally not possible without active conversion. VGA, in contrast, carries only analog RGB signals and requires a
DAC on the source side, making it incompatible with DVI-D at the electrical level despite sharing pin space on a DVI-I connector.
