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SPI

Category: Protocols | Also known as: serial peripheral interface

Serial Peripheral Interface (SPI) is a synchronous, full-duplex, master-slave communication protocol used for short-distance data exchange between microcontrollers and peripheral devices. It typically utilizes four signals: a clock, two data lines for bidirectional transfer, and a slave select line to address specific targets.

In practice

SPI is the preferred high-speed interface for connecting microcontrollers to sensors, SD cards, and display controllers. Unlike I2C, SPI does not use device addresses in the protocol; instead, it relies on a hardware Slave Select (SS) or Chip Select (CS) line for each peripheral. This allows for significantly higher throughput, often reaching tens of megahertz, because there is no addressing overhead or bus arbitration. Developers often use SPI for time-critical tasks like streaming data to a DAC or reading high-resolution ADC samples.

In Linux-based systems, developers often interact with SPI peripherals via the 'spidev' driver. This allows user-space applications to perform transfers without writing a custom kernel driver, which is a technique detailed in 'Peripheral Interaction Without a Linux Device Driver Using Spidev'. For debugging, an oscilloscope or logic analyzer is essential to verify clock polarity (CPOL) and phase (CPHA) settings, as mismatches between the master and slave will result in shifted or corrupted data bits.

When implementing SPI in hardware descriptions, as seen in 'VHDL tutorial - A practical example - part 2 - VHDL coding', the designer must explicitly manage the shift registers and clock edges. A common pitfall in SPI implementation is signal integrity on the clock line. Because SPI lacks formal flow control, ringing or crosstalk on the SCK line can cause the slave to see extra clock pulses, leading to permanent desynchronization until the next CS toggle.

Frequently asked

What are the four SPI modes?
The modes are combinations of Clock Polarity (CPOL) and Clock Phase (CPHA). They determine whether the clock idles high or low and whether data is sampled on the rising or falling edge.
Can SPI support multiple slaves?
Yes, either by using a dedicated Chip Select line for each slave or by daisy-chaining the data lines (SDO of one to SDI of the next) if the devices support it.
How does SPI compare to I2C in terms of speed?
SPI is generally much faster than I2C, as it is limited primarily by the drive strength of the pins and PCB traces rather than pull-up resistor values.
Why is my SPI data shifted by one bit?
This is almost always caused by a CPHA or CPOL mismatch, where the master shifts data out on one edge but the slave expects it to be stable on that same edge.

Differentiators vs similar concepts

Unlike I2C, which uses two wires and software addressing, SPI uses four wires and hardware selection. Unlike UART, which is asynchronous and relies on precise timing/baud rates, SPI is synchronous and uses a shared clock signal to coordinate data transfer.