
Forums More Forums
Custom CPU Designs
inIn the Forth language group there are occasional discussions of custom processors. This is mostly because a simple stack processor can be...
In the Forth language group there are occasional discussions of custom processors. This is mostly because a simple stack processor can be designed to be implemented in an FPGA very easily, taking little resources and running at a good speed. Such a stack processor is a good target for Forth. I know there are many other types of CPU designs which are implemented in FPGAs. I'm w
On log or in log?
inWriting a log object (as in log file, say logging accessed addresses using a browser) and the question "do I put something _on_ the log or do I...
Writing a log object (as in log file, say logging accessed addresses using a browser) and the question "do I put something _on_ the log or do I put it _in_ the log"is bugging me, obviously enough so I thought I'd ask. Some vague googling returned only about "log in"vs. "log on" which I did not even check if it was relevant. My memory seems to say "on", my inherent inclination is to say "in...
PCIe controller in congatec SMX8 does not work
inI try to get PCIe working in congatec SMX8 connected to the conga-SKIT/ARM i.MX8 motherboard. I use it with XTRX software radio module from...
I try to get PCIe working in congatec SMX8 connected to the conga-SKIT/ARM i.MX8 motherboard. I use it with XTRX software radio module from Fairwaves. Unfortunately, the PCIe controller does not start both with XTRX connected directly to MiniPCIe slot and with XTRX connected via original adapter to the M2 slot. I get the following in the dmesg: 0.000000] Booting Linux on physical CPU ...
Missing volatile qualifiers in MCU vendor header files?
inWhilst trying to track down an obscure bug, I noticed that ST header files do not specify volatile for peripheral registers. In contrast ARM...
Whilst trying to track down an obscure bug, I noticed that ST header files do not specify volatile for peripheral registers. In contrast ARM stuff (looking at CMSIS) is religious about volatile. For example, in stm32f413xx.h there's lots of stuff like #define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL) // nice hex address #define TIM2 ((TIM_TypeDef *) TIM2_BASE) // TIM2-> used throughout
newlib, FreeRTOS, reentrancy, heap and related questions
inUsually arm gcc compiler uses newlib (or newlib-nano) for standard C libraries (memset, malloc, printf, time and so on). I sometimes replace...
Usually arm gcc compiler uses newlib (or newlib-nano) for standard C libraries (memset, malloc, printf, time and so on). I sometimes replace newlib functions, because I don't like them. First of all, I replace snprintf because newlib implementation uses malloc and I don't like to use malloc, mostly if it can be avoided. And for printf-like functions, there are a few implementations that ...
FFT Speeds
inI'm not building anything, I'm just curious. I worked on a machine in the 80's called an attached array processor capable of 100 MFLOPS, the...
I'm not building anything, I'm just curious. I worked on a machine in the 80's called an attached array processor capable of 100 MFLOPS, the ST-100. It could do a 1K complex FFT in 0.86 msec. What sort of device would be required to do this today? A desktop would far exceed this performance. Low end single chip processors like an ARM CM3 would probably not reach this performanc
How to connect GPIO in QEMU-emulated nachine to an object in host?
inI need to connect the GPIO pins in the ARM machine emulated in QEMU to the GUI objects in application working on the host machine. For example,...
I need to connect the GPIO pins in the ARM machine emulated in QEMU to the GUI objects in application working on the host machine. For example, the level on the output GPIO should be reflected by a color of a rectangle. The input GPIO should be connected to a button. When the button in GUI is pressed, the input GPIO should be read as zero (otherwise as one) etc. Of course the input
Ada-Europe Int'l Conference 2020 (AEiC 2020) cancelled!
----------------------------------------------------------------------- Notice of CANCELLATION 25th...
----------------------------------------------------------------------- Notice of CANCELLATION 25th Ada-Europe International Conference on Reliable Software Technologies (AEiC 2020) www.ada-europe.org/conference2020 (was planned to be held 8-12 June 2020, Santander, Spain) #AdaEurope #AEiC2020 #A...
External SPI Flash for storing data
inMaybe someone remember the thread[1] that I created some months ago. I was searching a simple way to save on the external SPI Flash some...
Maybe someone remember the thread[1] that I created some months ago. I was searching a simple way to save on the external SPI Flash some constant data (mainly bitmaps) and copying them to SDRAM at startup. I finally put my hands on that project again and I think I've found a good solution. The MCU (LPC1785 from NXP) has an internal Flash memory starting from 0x0000 0000 and an extern...
STM32L4R9 native bootloader (system memory)
inI have a board that mounts STM32L4R9 MCU. I'm interested in the native USB bootloader, the one that resides in system memory. The BOOT0 pin...
I have a board that mounts STM32L4R9 MCU. I'm interested in the native USB bootloader, the one that resides in system memory. The BOOT0 pin can be pulled-down or pulled-up by resistors, but those resistors can't be moved (soldered/unsoldered) at every upgrade. What I'd like to do is: - at startup, if a USB cable is connected, system memory should be selected as boot memory area - a...
Ask a Question to the EmbeddedRelated community
To significantly increase your chances of receiving answers, please make sure to:
- Use a meaningful title
- Express your question clearly and well
- Do not use this forum to promote your product, service or business
- Write in clear, grammatical, correctly-spelled language
- Do not post content that violates a copyright
