Hi all, I've been working on a MsCAN driver for DP256. I am going over it and I have some questions: The MSCAN Block Guide V02.15 says...

Hi all, I've been working on a MsCAN driver for DP256. I am going over it and I have some questions: The MSCAN Block Guide V02.15 says that TX interrupt must be acknowledged by clearing the corresponding flag CANTFLG. 1. Should I ack the tx interrupt doing CANTFLG |= CANTFLG; ? this way I set the empty buffers ready for tx. 2. I only must clear the bit causing the interrupt, but h...

Hello All, iSYSTEM tells me that there is a bug at least in the 9S12D64 and 9S12DT128 (not in the DP256) so that it's not...

Hello All, iSYSTEM tells me that there is a bug at least in the 9S12D64 and 9S12DT128 (not in the DP256) so that it's not possbile to write EEPROM directly (without "monitor" code) via the BDM interface in special mode. The problem arises when accessi

Hi all, I am working towards designing motor control system using motorola HCS12 MCU. Just bought Codewarrior Standard edition...

Hi all, I am working towards designing motor control system using motorola HCS12 MCU. Just bought Codewarrior Standard edition as development environment and expecting DP256 evolution board in 2-3 weeks. To reduce the development time I am planning to use Codewarrior

Hello All. I have recently started to upgrade an old board that uses DP256B's with DP512. I managed to program the board a couple of days ago...

Hello All. I have recently started to upgrade an old board that uses DP256B's with DP512. I managed to program the board a couple of days ago with no issues. Today, I ran into a problem with my application code - it couldn't write to paged flash when downloading data from my PC app. This was quickly identified as a problem with the bank select in my flash loading routine. However no...

The Cosmic manual says -bs is 14 for 68HC12 processors. For the Star12, DP256, -bs causes the PPAGE register to be incorrect for far...

The Cosmic manual says -bs is 14 for 68HC12 processors. For the Star12, DP256, -bs causes the PPAGE register to be incorrect for far calls to banked memory. The manual calls the -bs "bank size" however it appears to be a shift offset of 16 bits. I address $328000 the PPAGE should

Hi, I have a system (DP256) under test where the code is located in physical space from 0x4000-0x7fff and 0xc000-0xffff. The code downloads...

Hi, I have a system (DP256) under test where the code is located in physical space from 0x4000-0x7fff and 0xc000-0xffff. The code downloads data int 0x8000-0xBFFF in page 0x3A which it uses to run the system. During the testing, the data is static, the code is changing as it is being debugged. I can save a lot of time if the flash in the paged area is not erased whenever I invoke the deb

Hi, Has anyone had issues working with linear addressing on the Star12 DP256, generating a true linear s-record (0x0C.0000 to...

Hi, Has anyone had issues working with linear addressing on the Star12 DP256, generating a true linear s-record (0x0C.0000 to 0x0F.FFFF ... thanks Gordon!) with the Hiware (hum, Metrowerks) compiler? It seems that Hiware is using the linear addresses during symbol resulution at lin

Hello dear people, actually we are trying to program, using a run-time routine, the EEPROM of the MCU: HCS912DP256, but we could not do it...

Hello dear people, actually we are trying to program, using a run-time routine, the EEPROM of the MCU: HCS912DP256, but we could not do it yet. We modify and traslate to C, the assembler routine used for Erase de EEPROM in the bootloader code, of course we change the code to command the internal FSM, that automatically erase and program this memory. The result is always the same, every t...

Hi all, I want the CodeWarrior debugger to NOT erase the EEPROM everytime I download user code to my DP256 or everytime I want to use the...

Hi all, I want the CodeWarrior debugger to NOT erase the EEPROM everytime I download user code to my DP256 or everytime I want to use the BDM. I have tried to comment this debugger commands: //mass erase eeprom //wb 0x110 CLKDIV // set ECLKDV clock divider //wb 0x114 0xFF // EPROT all protection disabled //wb 0x115 0x30 // clear PVIOL and ACCERR in ESTAT register //ww 0x118 0...