9S12DJ64 oscillator and BDM question

Started by drra...@gmail.com in 68HC128 years ago 5 replies

Hi all, I successfully designed and realized a project using a now extinct HC12 processor back in 2003, so I am now trying to use the 9S12DJ64...

Hi all, I successfully designed and realized a project using a now extinct HC12 processor back in 2003, so I am now trying to use the 9S12DJ64 to take its place. I have two questions: 1) I am using a Pierce oscillator on my 9S12DJ64 with an 8 MHz crystal (R_B=10M, with coupling caps into EXTAL and XTAL both at 22pF), PE7 driven low, VDDPLL bypassed to GND with 100nF. The PLL components a...


10% Fluctuation on Oscillator Frequency

Started by seanhurly in 68HC1214 years ago 4 replies

I am useing HC12E128CFU with a 16Mhz crystal. PLL disabled. Oscillator configuration is Collpits. If I spray the E128 with...

I am useing HC12E128CFU with a 16Mhz crystal. PLL disabled. Oscillator configuration is Collpits. If I spray the E128 with "freeze-it", and make sure the crystal is not cooled down, I experience a frequency drift of approx. minus 10 percent. Please help.


Instruction trace buffer

Started by Robert Milne in 68HC1211 years ago 4 replies

I have an unexplained intermittant reset that is defying my crude debugging methods (sci print statements and pod breakpoints) and I need a more...

I have an unexplained intermittant reset that is defying my crude debugging methods (sci print statements and pod breakpoints) and I need a more sophisticated tool to trace the source of the problem. The Techarts bdm (xg) I own is useless with noice when the pll is active, but even with a more capable pod I'm unsure whether an affordable instruction trace buffer is available. Can anyone sug...


SCI max baud rate?

Started by Gary Olmstead in 68HC1213 years ago 4 replies

I'm pushing numbers around in the SCI module, and have a question. If I set BUSCLK (or SCICLK, same difference) to, say 25 MHz, and set...

I'm pushing numbers around in the SCI module, and have a question. If I set BUSCLK (or SCICLK, same difference) to, say 25 MHz, and set SCIBR to 1, the calculated baud rate is 1.562500 MHz. I don't have any hardware to try this on, so I have to ask: Is this possible in real life? Or is it like the PLL, where you can plug in numbers that can't be achieved in


Second request - please confirm my calculations for FCLKDIV

Started by Steve-HighPoint in 68HC1215 years ago 1 reply

Hello All: I want independent confirmation of the values I have selected for ECLKDIV and FCLKDIV. I don't want to damage the...

Hello All: I want independent confirmation of the values I have selected for ECLKDIV and FCLKDIV. I don't want to damage the eeprom or flash by using the wrong values. My setup: 1.. 4.9152 Mhz clock oscillator driving EXTAL. SYNR = 9, REFDIV = 1, PLL enabled and generates 24.576 Mhz bus c


Please confirm ECLKDIV and FCKLDIV values ....

Started by Steve-HighPoint in 68HC1215 years ago 1 reply

Hello All: I want independent confirmation of the values I have selected for ECLKDIV and FCLKDIV. I don't want to damage the...

Hello All: I want independent confirmation of the values I have selected for ECLKDIV and FCLKDIV. I don't want to damage the eeprom or flash by using the wrong values. My setup: 1.. 4.9152 Mhz clock oscillator driving EXTAL. SYNR = 9, REFDIV = 1, PLL enabled and generates 24.576 Mhz bus c


Re: Syncing 32Mhz Bus To 2Mhz PWM

Started by Anonymous in 68HC1214 years ago 2 replies

Hello, I am using DP256 EVM from motorola with stock 16mhz osc / 8mhz bus. I have been able to over clock mcu to 32mhz bus speed...

Hello, I am using DP256 EVM from motorola with stock 16mhz osc / 8mhz bus. I have been able to over clock mcu to 32mhz bus speed trying a few different pll settings. When I enable ECLOCK output it seems to start either high or low output when processed from flash/eeprom or ram. is there an


P&E Source level debug tool questions

Started by Steve-HighPoint in 68HC1215 years ago 2 replies

Mark from P&E indicated in another stream that P&E offers a full source level debugging system based on the IEEE 695 protocol. This is...

Mark from P&E indicated in another stream that P&E offers a full source level debugging system based on the IEEE 695 protocol. This is very interesting. I would like to start a discussion of this tool and it's capabilities. 1. Does it support full 25Mhz bus operation? Can I use the PLL


Stuck in "Self Clock Mode"

Started by cleancontrollers in 68HC1215 years ago

Code ran fine on 68hc9sC32 eval board. In fact the PLL init code I'm using was lifted from the eval kit. After changing...

Code ran fine on 68hc9sC32 eval board. In fact the PLL init code I'm using was lifted from the eval kit. After changing register include file, REFDV and SYNR I loaded the code into my actual board which uses hc9s12A64 (die 2L86D). I am using a 7.3728MHz crystal and set my bus


Why I can't use the PLL in MC9S12DP256B in Normal Single-Chip Mode

Started by in 68HC1214 years ago 1 reply

68HC12????ã? I have programmed a simlpe demonstration program to see the MC9S12DP256B to run in Normal Single-Chip Mode.The...

68HC12????ã? I have programmed a simlpe demonstration program to see the MC9S12DP256B to run in Normal Single-Chip Mode.The program is to generates 60 1-second,active-low pulses on PB0. At first I use the default settings out of reset,while I use a 16MHz puartz,the default bus clock i


integer clock vs. binary clock (9S12DP256)

Started by ctrobot28 in 68HC1215 years ago 8 replies

The BDLC module has to be told (CLKS bit) whether the bus clock is integer or binary. For my board the clock (PLL) is 24 Mhz -...

The BDLC module has to be told (CLKS bit) whether the bus clock is integer or binary. For my board the clock (PLL) is 24 Mhz - if integer that would be 24,000,000, if binary it would be 25,165,824 (24*1024*1024). How do I tell which it is? The crystal is 4 Mhz, but the dat


Reg: Default Memory map for MC9S12XDP512 mcu

Started by yadunandan kasu in 68HC1211 years ago 2 replies

Hi everyone, I am working on MC9S12XDP512 mcu using HCS12X starter kit, I am not very good at MCU knowledge right now. During my work, I...

Hi everyone, I am working on MC9S12XDP512 mcu using HCS12X starter kit, I am not very good at MCU knowledge right now. During my work, I got stuck in the Memory map concept in this MCU. I created a project using Codewarrior(Version 5.7.0). I just initialized the PLL module and use some basic code to glow the LED's and downloaded the soruce to the Starter kit using BDM and its working...