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SDRAM data garbled due to seperate PCB for SDRAM ???

Started by Mayank Kaushik in comp.arch.embedded19 years ago 19 replies

Hi, Im trying to interface two 128Mbit SDRAMs (MT48LC8M16A2) to the AT91RM9200, but it doesnt seem to be going right. I have a custom...

Hi, Im trying to interface two 128Mbit SDRAMs (MT48LC8M16A2) to the AT91RM9200, but it doesnt seem to be going right. I have a custom board for the AT91, and a seperate board for the SDRAM, the two are connected through an ordinary ribbon cable. The master clock of the uC is running at 60Mhz. To test the integrity of the RAM, im writing data to a series of locations, say from 0x2000_000...


HDLC Synchronous RS232

Started by sunil in comp.arch.embedded19 years ago 8 replies

hi all, iam currently programming MC68360 board processor SCC's to work for Synchronous HDLC and iam taking out RS232 pin outs from the...

hi all, iam currently programming MC68360 board processor SCC's to work for Synchronous HDLC and iam taking out RS232 pin outs from the P2 connector. I have initialized the registers and set jumpers according to the instructions. but iam not getting the Clock signals from the TXCLK lines. can u pls give me some hints what r the things that can go wrong which will lead to this kind of ...


Global Variables Being Overwritten

Started by jgurtner in comp.arch.embedded18 years ago 4 replies

Is there a better way of doing this: LCDWrite("This is a test"); void LCDWrite(char *buffer) { while(*buffer) /* loop until buffer...

Is there a better way of doing this: LCDWrite("This is a test"); void LCDWrite(char *buffer) { while(*buffer) /* loop until buffer is empty */ { PortC = *buffer; /* write data to LCD data port */ LCDEnable(); /* clock the LCD to accept data */ buffer++; /* increment the pointer to the next character */ } } This works fine but it seems that if I...


How to Reset the AT24C01?

Started by Loamlo in comp.arch.embedded18 years ago 3 replies

What is the quickest way to make the data in AT24C01 reset to 0xFF? I write 0xFFto every byte, but that take a long time. Is there any simpler...

What is the quickest way to make the data in AT24C01 reset to 0xFF? I write 0xFFto every byte, but that take a long time. Is there any simpler method? In the datasheet of AT24C01: MEMORY RESET: After an interruption in protocol, power loss or system reset, any 2- wire part can be reset by following these steps: 1. Clock up to 9 cycles. 2. Look for SDA high in each cycle while SCL is high...


FTDI FT245R power requirement

Started by Mark Borgerson in comp.arch.embedded15 years ago 5 replies

I've used the FT245R for USB data upload in a number of data logger designs. I have generally used the logger 3.3V supply to power the chips....

I've used the FT245R for USB data upload in a number of data logger designs. I have generally used the logger 3.3V supply to power the chips. However, I just ran across the following note in the most recent FT245R data sheet: "Notes: 1. The minimum operating voltage VCC must be +4.0V when using the internal clock generator." This not was not present in earlier incarnations of th...


PIC 18 Series - HS+PLL Enabled Clock Mode

Started by John Lucas in comp.arch.embedded19 years ago 2 replies

Hi I am using a PIC18F452 with an external 8MHz crystal. I am trying to enable the HS+PLL Enabled mode, the device programs okay, and...

Hi I am using a PIC18F452 with an external 8MHz crystal. I am trying to enable the HS+PLL Enabled mode, the device programs okay, and when read back, the configuration values are correct, however, in use, the device is still running at 8MHz. I am using MPLAB 6.62 with an ICDII. Can anyone suggest a reason why the PLL may not be working. Thanks John Lucas


programming atmega48

Started by Hul Tytus in comp.arch.embedded15 years ago 1 reply

comp.arch.embedded programming atmega48 The code below is still not working, but some other code using the external interupt mechanism...

comp.arch.embedded programming atmega48 The code below is still not working, but some other code using the external interupt mechanism strictly to execute a routine is running. The difficulty there was using: sts EIMSK, areg rather than: out EIMSK, areg. Possibly, considering the code below, the clock for the interupts is disabled unless both the specific mask bit and the maste...


Pipelined 6502/z80 with cache and 16x clock multiplier

Started by Brett Davis in comp.arch.embedded13 years ago 101 replies

EETimes had an interesting article asking if 4-bits was dead. http://www.eetimes.com/discussion/other/4211452/Is-4-Bits-Dead- These chips have...

EETimes had an interesting article asking if 4-bits was dead. http://www.eetimes.com/discussion/other/4211452/Is-4-Bits-Dead- These chips have been pad limited for 2 decades, and as such are probably manufactured at fabs that are beyond obsolete. You could take a public CPU design like OpenRISC and replace the instruction decoder, and get an easy ~4x performance jump running 65c802/65c81...


PICmicros instruction counter synchronization

Started by Robert Scott in comp.arch.embedded20 years ago 5 replies

Does anyone know if any of the Microchip PICmicros reset their divide-by-four instruction counter during a hardware reset? I need to drive an...

Does anyone know if any of the Microchip PICmicros reset their divide-by-four instruction counter during a hardware reset? I need to drive an array of PICs from a single clock, and more than that, I need all the PICs to be exactly synchronized with respect to their instruction cycles. I am hoping that releasing them from reset at the same time will accomplish this goal. I am looking primar...


global clock (gclk) input at xilinx virtex4 fpga

Started by Denkedran Joe in comp.arch.embedded16 years ago 2 replies

Hi there, I'm using a Virtex4 FX100 FPGA (package FF1517) in a board design and I wonder if it is enough to use just one gclk input on the...

Hi there, I'm using a Virtex4 FX100 FPGA (package FF1517) in a board design and I wonder if it is enough to use just one gclk input on the device or if it's advisable to use more than one due to the large package size...? Does it make any difference where I put the gclk input(s)? Thank you for your support... Regards Joe


Zilog Z8S180 problems

Started by Mike Harding in comp.arch.embedded19 years ago 6 replies

I seem to be unable to access the new registers on the Zilog Z8S180 CPU, things like the Clock Multiplier register, the additional DMA register...

I seem to be unable to access the new registers on the Zilog Z8S180 CPU, things like the Clock Multiplier register, the additional DMA register etc. When I try to write to these registers my writes seem to be ignored and when I read them back I read FF from most 00 from one. Anyone else having problems with this chip or know the secret code to make it work? :) For all the world it's behaving...


DS1306 RTC Read with HC08 SPI

Started by Thunder in comp.arch.embedded20 years ago 1 reply

Hi, I'm attempting to use a real-time clock (DS1306) by interfacing it with a HC08GP32 microcontroller using the SPI. To get my algorithm...

Hi, I'm attempting to use a real-time clock (DS1306) by interfacing it with a HC08GP32 microcontroller using the SPI. To get my algorithm working, I am using some of the extra RAM located in the DS1306 to write a few registers and then attempt to read them. It seems that the writing part works fine; however, when I attempt to read back what I've written, I get varying results. I'm usi...


Maximum frequency

Started by knight in comp.arch.embedded15 years ago 2 replies

Hi all, Iam using Xilinx XST for synthesis. Iam using almost 20 modules in my design. each if i synthesize seperately iam getting a maximum...

Hi all, Iam using Xilinx XST for synthesis. Iam using almost 20 modules in my design. each if i synthesize seperately iam getting a maximum frequency of more than 400 Mhz. But when i combine everything iam getting only 121Mhz. Can you tell me the reason...??? Does this mean i cannot use a clock more than 121 Mhz in my design(iam using and found it working well..) How can i increase my...


Are watts per MHz linear?

Started by Ghazan Haider in comp.arch.embedded18 years ago 2 replies

In looking at various 32-bit MCUs, I've seen watts per MHz mentioned. A linuxdevices.com news article talks about Powerpc 405: "Power usage...

In looking at various 32-bit MCUs, I've seen watts per MHz mentioned. A linuxdevices.com news article talks about Powerpc 405: "Power usage is listed as 0.2mW/MHz". So lets take the simple PIC. Can I clock it down and watch power usage go down linearly? If a chip is 10mA at 10MHz, will it be 10uA at 10kHz? I take it theres always a base current at DC. so the equation should be (K x MHz) + ...


Generating 6MHz output frequency

Started by djordj in comp.arch.embedded17 years ago 4 replies

I need to drive a 320x240x8bbp TFT color display (Hitachi XT14 series). I need to provide a clock signal @ ~6MHz and I can't use a micro with a...

I need to drive a 320x240x8bbp TFT color display (Hitachi XT14 series). I need to provide a clock signal @ ~6MHz and I can't use a micro with a built in controller. Options are: 1) driving the TFT directly from the microcontroller 2) using an EPSON controller (or a dedicate FPGA) As I have to use STR9 chip, I'm trying to figure out if I can really obtain this output frequency: the pro...


Atmega168 and peripheral interrupts

Started by P.Marek in comp.arch.embedded18 years ago 2 replies

I have a problem with an atmega168. On my test board I have a jumper on PB1 and a LED on PD5, using internal 8MHz RC-clock. Given the...

I have a problem with an atmega168. On my test board I have a jumper on PB1 and a LED on PD5, using internal 8MHz RC-clock. Given the following program: #include #include #include INTERRUPT(SIG_PCINT0) { unsigned short i; char j; for(j=0; j


Atmega8-L at 8MHz internal oscíllator not stable?

Started by Antti in comp.arch.embedded11 years ago 8 replies

Hi I am not believing what I see, but I have a board where ATmega8L doesnt want to work with 8MHz internal oscillator setting - the datasheet...

Hi I am not believing what I see, but I have a board where ATmega8L doesnt want to work with 8MHz internal oscillator setting - the datasheet does not say its invalid setting, and I think I have used it before, but now this board only works at 4MHz or at 8MHz when the OSCCAL is written to lower value


Failure of 68HC908KX8 Monitor Mode

Started by Jack in comp.arch.embedded19 years ago 13 replies

Question: Is it possible to somehow disable the KX8's monitor mode by means of an application loaded into its flash memory? My setup as...

Question: Is it possible to somehow disable the KX8's monitor mode by means of an application loaded into its flash memory? My setup as follows: I built a MON08 circuit as per circuit on page 193 of 68HC908KX8.pdf. I used a 74HC04 inverter with 9.8304MHz crystal, and constructed the circuit on Veroboard. All voltage levels on the device measures OK, as well as the clock signal. I proceede...


8- to 16-bit Embedded System Upgrade

Started by karlbkeller in comp.arch.embedded20 years ago 19 replies

Hi! We're on a new project with the golden opportunity to upgrade a system from an 8-bit 8051 to a 16-bit MPU TBD. The application is pretty...

Hi! We're on a new project with the golden opportunity to upgrade a system from an 8-bit 8051 to a 16-bit MPU TBD. The application is pretty straightforward bit fiddling, with a clock interrupt and (USB?) link to a Windows PC. It's a basic interruptible single-tasking app, so it doesn't need a real time kernel. We want to move from assembler to C/C++ source, so compiler/library and debug t...


Another high end 16/32 bit uC, Wide Vcc, Wide Temp

Started by Jim Granville in comp.arch.embedded17 years ago 1 reply

I see Infineon release (early samples of) another iteration on their proven XC166 series, the XC2200 family : "most of the XC226x?s...

I see Infineon release (early samples of) another iteration on their proven XC166 series, the XC2200 family : "most of the XC226x?s instructions can be executed in just one machine cycle which requires 15ns at 66 MHz CPU clock. For example, shift and rotate instructions are always processed during one machine cycle independent of the number of bits to be shifted. Also multiplication ...



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