Forums Search for: Clock
Where to add new block in NVM?
In our target board, we use 32K x 8 EEPROM. Our NVM is partitioned into non-relocatable area and relocatable area. In the non-relocatable...
In our target board, we use 32K x 8 EEPROM. Our NVM is partitioned into non-relocatable area and relocatable area. In the non-relocatable area, there is block reserved for machine serial number, a block reserved for clock value, and number of other blocks for different variables. In the relocatable area, we have two big blocks. One block stores machine events and the other block stores machi...
SPI Flash: don't work high-speed read at 48MHz
I'm using Microchip SST26VF064B SPI Flash memory with an LPC1768 from LPC. It works until I change the SPI clock frequency from 24MHz to...
I'm using Microchip SST26VF064B SPI Flash memory with an LPC1768 from LPC. It works until I change the SPI clock frequency from 24MHz to 48MHz. I'm using HIGH-SPEED READ command that should work up to 104MHz (the power supply is 3.3V). For example I read 0x28 0x26 when they should be 0x51 0x4C. 0010 1000 0010 0110 -> 0x28 0x26 0101 0001 0100 1100 -> 0x51 0x4C They appears s
About EZ-USB FX2 Using external clock
I use Cypress EZ-USB FX2 for a data transmit system, FX2 in Slave FIFO mode, with FPGA as the master. I write proogram to transmit data from...
I use Cypress EZ-USB FX2 for a data transmit system, FX2 in Slave FIFO mode, with FPGA as the master. I write proogram to transmit data from the PC to FX2.(direc is OUT) The problem is , when I set IFCONFIG = 0xC3 in firmware, which means Slave FIFOs executes on internal 48MHz clk source, it works well. but I need to set IFCONFIG = 0x43, which means Slave FIFOs executes on external clk s...
