AT91SAM7A3 real-time timer

Started by Mochuelo in comp.arch.embedded13 years ago 3 replies

Hi, I see in the datasheet of the AT91SAM7A3 that the real-time timer (RTT) is fed by the Slow Clock, which is an internal RC...

Hi, I see in the datasheet of the AT91SAM7A3 that the real-time timer (RTT) is fed by the Slow Clock, which is an internal RC oscillator (f=22 kHz to 42 kHz). The RTT has a 16-bit prescaler and a 32-bit counter. How are we supposed to use such an inaccurate clock as the source for a real-time timer? The only way I can think of is to add a crystal (which will not always be running (other...


verilog HDL problem

Started by nasi...@gmail.com in comp.arch.embedded12 years ago 1 reply

what is the error in the following code. in it the main module is "test". in that module's "always" block another module "counter" is called....

what is the error in the following code. in it the main module is "test". in that module's "always" block another module "counter" is called. but it shows error. how can i solve the problem? how can i call another module in always block? module counter(clock, reset, count); input clock, reset; output [3:0] count; reg [3:0] next_count,count; always@* begin ...


AT91SAM7S256-128-64-321 USB and USART usage (clocking)

Started by jaac in comp.arch.embedded13 years ago 2 replies

Hi, I want to know if it is possible to use at the same time the USB and UART peripheral on the AT91SAM7S256-128-64-321, with zero error on...

Hi, I want to know if it is possible to use at the same time the USB and UART peripheral on the AT91SAM7S256-128-64-321, with zero error on the UART part. The clocking scheme is what concerns me. As far as I understand you have the main clock MCK from an external crystal (or clock signal). Is MCK derived directly, I mean, does MCK have the same frequency as the external crystal? The UAR...


Atmel AVR STK500 XT1 & XT2 pins?

Started by RajW in comp.arch.embedded15 years ago 2 replies

Simple noobie question about the Atmel AVR STK500... Can the XT1 and XT2 pins on PORTE\AUX used to supply a clock signal to an external...

Simple noobie question about the Atmel AVR STK500... Can the XT1 and XT2 pins on PORTE\AUX used to supply a clock signal to an external device (explanation below)? As I am learning to program and interface the AVR's I have a 16550 UART on a separate experiment board and I see that the 16550 needs a crystal or clock source on pins 16 and 17 (XIN and XOUT)... can the XT1 and XT2 pins be ...


real-time clock in code composer

Started by guus_hiddink in comp.arch.embedded4 years ago 21 replies

I need to write a program that implements a real-time clock in code composer studio. The LCD display shows hours , minutes and seconds ....

I need to write a program that implements a real-time clock in code composer studio. The LCD display shows hours , minutes and seconds . By pressing a button you can enter / exit in setting mode which is characterized by on / off LED. Pressing one of the other three keys in setting mode you can set hours , minutes and seconds . Can someone help me? --------------------------------------- Poste...


Timer reset on compare match ??

Started by Robert Bielik in comp.arch.embedded15 years ago 1 reply

Hi All, I'm sitting here with a H8S/2633F cpu and I'm setting up a 16 bit TPU for reset on compare match A (TGRA). The question is: When...

Hi All, I'm sitting here with a H8S/2633F cpu and I'm setting up a 16 bit TPU for reset on compare match A (TGRA). The question is: When exactly will the timer reset ? ON compare match, or the clock pulse after ?? I.e. if I set TGRA to 0x1234, what will the timer range be? A) 0x0000 - 0x1234 meaning that a loop will contain 0x1235 clock pulses B) 0x0000 - 0x1233 -> loop contains 0x1234


Journal Special Issue on Software Development for Multi-Core Computing Systems

Started by Sabri Pllana in comp.arch.embedded11 years ago

CALL FOR PAPERS Scientific Programming Journal Published by IOS Press Special Issue on Software Development for Multi-Core Computing...

CALL FOR PAPERS Scientific Programming Journal Published by IOS Press Special Issue on Software Development for Multi-Core Computing Systems AIMS AND SCOPE: The improvement of single-processor performance by increasing clock rate and instructions-per-clock number has reached its technological limits. Increasing instead the num


Phase noise - Analog Clock Synthesizer - AD9548

Started by YH in comp.arch.embedded9 years ago

Hello, I'd like to compare phase noise performances of different clock synthesizer but I do not know how to proceed: Analog datasheet gives you...

Hello, I'd like to compare phase noise performances of different clock synthesizer but I do not know how to proceed: Analog datasheet gives you "Additive Phase noise" curves for different conditions of xtal, Loop BW,input and output frequencies... while Silicon Labs for example gives you "Phase Noise" curves at given input/output frequencies... How would you compare chips and to know which one...


Sd Card Idle

Started by Akila.S in comp.arch.embedded9 years ago

Hi, I am trying to initialize Transcend 1GB Micro SD Card for my application. I am first initializing clock to KHz and then sending 80...

Hi, I am trying to initialize Transcend 1GB Micro SD Card for my application. I am first initializing clock to KHz and then sending 80 clock pulses by making chip select high(Chip select is Active low signal), then I am making chip select low(Assert Chip Select) then sending Command0(0x40, 0x00, 0x00,0x00,0x00,0x95). But the response from the SD Card is 0x0000. It is not being IDLE. It is ...


I2C vs SPI

Started by Joe G (Home) in comp.arch.embedded10 years ago 9 replies

Hi All, SPI is more simplistic in internal IC hardware design than I2c. If the SPI data bus receive garbage (spikes or noise) you can pull...

Hi All, SPI is more simplistic in internal IC hardware design than I2c. If the SPI data bus receive garbage (spikes or noise) you can pull the chip select high and start clocking the data in/out again. SPI has /CS chip select Clock Data out Data in I2C has Clock Data Question ======== If an I2C bus receives garbage, how does one tell a I2C receiver to "reset" and start...


MicroBlaze latencies

Started by 3.14 in comp.arch.embedded14 years ago 1 reply

In "Embedded System Tools Guide" on EDK6.2 say: ".... MicroBlaze requires 2 clock cycles to access on-chip Block RAM connected to the LMB...

In "Embedded System Tools Guide" on EDK6.2 say: ".... MicroBlaze requires 2 clock cycles to access on-chip Block RAM connected to the LMB for write and 2 clock cycles for read. On chip memory connected to the OPB bus requires 3 cycles for write and 4 cycles for read...." I don't understand, request latecies to BRAM = 1 tick. Request latecies to OPB (from timing waveforms) = 1 tick, if "Ac...


m68k-elf-objcopy does not convert .ELF to .BIN file

Started by KBG in comp.arch.embedded13 years ago 7 replies

Hi, .ELF to .BIN conversion is working for one set of source code , but it is not working with another set of code . I do the following...

Hi, .ELF to .BIN conversion is working for one set of source code , but it is not working with another set of code . I do the following for converting the .ELF to .BIN : "m68k-elf-objcopy -O binary clock.elf clock.bin". Does source code have any role in affecting the generation of .ELF to .BIN ? OR Does configuration settings of the compiler that generates the .ELF file ...


Real Time Clock

Started by David Evennou in comp.arch.embedded15 years ago 10 replies

I am looking for a RTC Chip, maybe with SPI for communications with 68HC908GP32. Any suggestions? TIA, David

I am looking for a RTC Chip, maybe with SPI for communications with 68HC908GP32. Any suggestions? TIA, David


OMAP 5912 and 5910 - MPU Clock/Reset/Power Mode Control Registers

Started by karthikbg in comp.arch.embedded13 years ago 1 reply

Hi, I have some queries based on the MPU Clock/Reset/Power Mode Control Registers of OMAP 5912 and 5910. Does the term "OMAP 3.2 hardware...

Hi, I have some queries based on the MPU Clock/Reset/Power Mode Control Registers of OMAP 5912 and 5910. Does the term "OMAP 3.2 hardware engine" mentioned in OMAP 5912 technical document refer to the term "DSP" mentioned in OMAP 5910 technical document. Pls find the snapshot of the info : In OMAP 5912 ============= ARM_RSTCT1 - MPU Reset Control 1 Register . This is a 32-bit ...


Flash mcu with SPI slave capable of 16MHz operation?

Started by Antti in comp.arch.embedded12 years ago 16 replies

I guess none available :( all seem limit to clock/4 or something but maybe I have missed some good part? Antti

I guess none available :( all seem limit to clock/4 or something but maybe I have missed some good part? Antti


microcontroller selection

Started by eeh in comp.arch.embedded14 years ago 7 replies

Hi, I want to select a 8 bit microcontroller which can be run under 3V and with 12MHz clock. Any choice?

Hi, I want to select a 8 bit microcontroller which can be run under 3V and with 12MHz clock. Any choice?


8051 architecture

Started by Anonymous in comp.arch.embedded13 years ago 45 replies

Why 8051 need 2 clock cycle for 1 system state?

Why 8051 need 2 clock cycle for 1 system state?


486 pll

Started by Anonymous in comp.arch.embedded14 years ago 2 replies

Does anyone know if the internall PLL on an Intel 80486 can be by-passed or disabled? I want to single step using an externally controlled...

Does anyone know if the internall PLL on an Intel 80486 can be by-passed or disabled? I want to single step using an externally controlled clock without the PLL. Thanks, Wayne


8253

Started by Pascal Garcia in comp.arch.embedded13 years ago 1 reply

Hi, sorry if this is off-topic, but reading the datasheet of the 8253, I don't understand the sentence concerning the mode 2 and 3 : "In...

Hi, sorry if this is off-topic, but reading the datasheet of the 8253, I don't understand the sentence concerning the mode 2 and 3 : "In modes 2 and 3, if a CLK source other than the system clock is used, GATE should be pulsed immediately following /WR of a new count value" can somebody help me ? pascal


Micro with 5-6 independent UARTs?

Started by ElderUberGeek in comp.arch.embedded12 years ago 12 replies

Anyone know of a micro that has 5-6 UARTS that can each run a different baud rate? (meaning not the same clock). Oh, and a TCP stack would be...

Anyone know of a micro that has 5-6 UARTS that can each run a different baud rate? (meaning not the same clock). Oh, and a TCP stack would be nice also.... Thanks