Hi, I was wondering if anyone has ever use FPGA to communicate with another board that use PC/104 plus bus as the interface? To give a better...

Hi, I was wondering if anyone has ever use FPGA to communicate with another board that use PC/104 plus bus as the interface? To give a better view, I have one firewire board that uses a PCI-to-1394 host chip and another board that has an FPGA on it. I would like to control the firewire by using the FPGA. Does anyone has any suggestion on how to do this? I've tried using Xilinx PCi IPCor...

Hi all, I have just released a new online Video guide called "The BurchED Getting Started with Xilinx FPGAs Video Guide"...

Hi all, I have just released a new online Video guide called "The BurchED Getting Started with Xilinx FPGAs Video Guide" http://www.BurchED.com It is an easy step-by-step guide for FPGA beginners. I go all the way through from "What is an FPGA?" right up to compiling designs and downloading to your FPGA board There's a Free Membership area where you can watch some videos for free. ...

Just wondering, does hobbyist with fund less than USD200/month could afford playing with FPGA ? Is there any link that I can read about it ?...

Just wondering, does hobbyist with fund less than USD200/month could afford playing with FPGA ? Is there any link that I can read about it ? (since looks like every FPGA developer is belonging in big company and universities). I want to know what kind of tools that I need (like the compiler, development board, debugger, etc). Thus, is there any link to cheap version of it :p (I've rea...

Hi, I debated putting this announcement here, however, if you are doing ASIC, or FPGA embedded design, this might be of help. I recently...

Hi, I debated putting this announcement here, however, if you are doing ASIC, or FPGA embedded design, this might be of help. I recently created a Google custom search engine called ChipHit at http://www.chiphit.com. Please take a look and provide suggestions. I spend many hours a day searching the internet for ASIC, FPGA, and EDA tool topics as I am ASIC/FPGA applications engineer. F...

I am new to the FPGA and I want to learn by small experiments. Can some FPGA experts tell me what is the easiest and least expensive way of...

I am new to the FPGA and I want to learn by small experiments. Can some FPGA experts tell me what is the easiest and least expensive way of getting started ? What eventually I want to implement (what I'm dreaming) are; * Communicate with four RS232 devices (115200baud) simultaneously * Control 16 parallel I/O lines * Encode/decode multi channel Radio Control signals ...

i have to build a weather station. the data from the sensors is to be transmitted via ethernet and IP protocols.. i couldnt really reach a...

i have to build a weather station. the data from the sensors is to be transmitted via ethernet and IP protocols.. i couldnt really reach a decision on which of these develpoment tools should i use.. or which one is better..? 1. FPGA 2. PIC18F + EN28J60+eeprom ( all from microchip) 3. microntroller with built in ethernet controller OPTION1: its a college project, so FPGA's are readily ...

Hi all , I am devoloping software fro microblaze using XPS and I dont have enough resources for a watchdog timer. I want to reset the FPGA...

Hi all , I am devoloping software fro microblaze using XPS and I dont have enough resources for a watchdog timer. I want to reset the FPGA after n number of error conditions have occured in software. Whats the most reliable way to reboot the Xilinx Spartan 3 FPGA? Any help will e much appreciated. BR Rate

I am using a version of the TINIm400 and the TINIs400 reference design with an FPGA connected to CE3 and CE4. I wish to access the registers I...

I am using a version of the TINIm400 and the TINIs400 reference design with an FPGA connected to CE3 and CE4. I wish to access the registers I have placed in the FPGA but am wondering how to do it. I assume by default the FPGA is effectively at 0x60 0000 (for CE3) but how do I place a variable at this address so I can access with a C instruction. Apologies if it's very obvious.

Hi everyone, Now, I'm quite new in this, so please forgive me if I say silly things. I'm seeing whether or not it is possible (feasible) to...

Hi everyone, Now, I'm quite new in this, so please forgive me if I say silly things. I'm seeing whether or not it is possible (feasible) to implement MLC NAND error correction coding on our current system. We have a cortex-M3 (1MB Flash, 128K RAM) and a small FPGA with no DSP. On the FPGA I only have ~1K LUTs remaining. After searching the internet I found that BCH most commonly men...

Hi all, I am currently working on porting some code on microblaze from a spartan 3 FPGA to a virtex 2 pro FPGA for expansion reasons. The...

Hi all, I am currently working on porting some code on microblaze from a spartan 3 FPGA to a virtex 2 pro FPGA for expansion reasons. The code which really works on a spartan 3 FPGA, just somehow does not seem to work on the virtex 2 pro. Here are some details: 1) for the spartan 3 FPGA, I used both EDK9.1i+ISE 7.1i and EDK9.2i +ISE9.2i the same firmware running on the spartan wor...

hiya in the particular case of fpga and the collaboration with xilinx remote monitoring, we could try to integrate the flow control of the...

hiya in the particular case of fpga and the collaboration with xilinx remote monitoring, we could try to integrate the flow control of the xilinx using centers of excellence. as a drawback i think that we could develop the recovery of the xilinx accurately. as a result when troubleshooting fpga and the concept of xilinx authorization, it might be better to increase the footprint of the ...

Hi all, I'm designing an FPGA based board. I needed to add DDR-SDRAM. Is there a way to interface the SDRAM to the FPGA other than develop/buy...

Hi all, I'm designing an FPGA based board. I needed to add DDR-SDRAM. Is there a way to interface the SDRAM to the FPGA other than develop/buy a controller to put inside the FPGA? I mean: are there external DDR-SDRAM controllers? Cheers

How is a "processor" defined when considering requirements on developing a design? A project I am on is shoving software into HDL to design an...

How is a "processor" defined when considering requirements on developing a design? A project I am on is shoving software into HDL to design an FPGA which is being considered "hardware". I'm not fighting it because FPGAs are what I do. Board level design is a necessary evil to support the FPGA. If not for the desire to make approval easier the FPGA would not be on the board.

Hi, I am new in FPGA and FX2 UC. I am looking for a good development board including xilinx FPGA and cyress Fx2 uc. I want to learn how to...

Hi, I am new in FPGA and FX2 UC. I am looking for a good development board including xilinx FPGA and cyress Fx2 uc. I want to learn how to program FPGA and FX2 uc. I went to several websites( usbp, Gnuradio, opal kelly, digilent...). They provide good development boards, but not all source codes open and no good tutorial written. Is any one know a good tutorial for Cypress FX2 uc + Xilinx F...

We're doing a project that uses about 150 DDR2 SODIMMs. Because we're using an FPGA, rather than a conventional motherboard chipset, the...

We're doing a project that uses about 150 DDR2 SODIMMs. Because we're using an FPGA, rather than a conventional motherboard chipset, the DDR2 controller IP demands we have to burn the DIMM timing into the FPGA when synthesising it, rather than reading the EEPROM at runtime. The FPGA DDR2 memory system is a lot less bulletproof than the average motherboard, so it needs to be heavily tested w...

It will be the first FPGA for me. What I want to do is not complex, I have done similar controllers (more complex really)numerous times using...

It will be the first FPGA for me. What I want to do is not complex, I have done similar controllers (more complex really)numerous times using logic parts, PLD, CPLD-s etc. I need to put together a display controller, to just do framebuffer memory -> display interface. Framebuffer memory will be some sort of DDRAM (DDR-which depending on the FPGA type), I'll be happy with a 1920x1080 framebuf

Hi all , Can any one tell me a generic pattern to designing an interface between MCU(Configuring the Hardware ) and FPGA(used as...

Hi all , Can any one tell me a generic pattern to designing an interface between MCU(Configuring the Hardware ) and FPGA(used as an accelerator). My initial thoughts are to have a dual port RAM implemented in FPGA and accessed as a memory mapped device from the MCU and used to configure the Hardware. Is this viable ? is this the norm? Are there any tutorials on the net that can help(...

I'm just getting into FPGA design. What are good FPGA vendors in terms of good chips, good tools and good support? Also, if you've used the...

I'm just getting into FPGA design. What are good FPGA vendors in terms of good chips, good tools and good support? Also, if you've used the Cypress PSoC mixed analog & digital chips & tools, how did you find them? - Chris

Hi guys, I am developing a project that involves tens of 8 bit buffers. I am designing it with regular TTL logic but maybe in the future I...

Hi guys, I am developing a project that involves tens of 8 bit buffers. I am designing it with regular TTL logic but maybe in the future I will use FPGA if the project works. Well, I know developing with FPGA is better but I just don't have the initial investment and I have a lot of experience with TTLs. I can design it either with 74ls373 or 74ls374. If I use 74ls374, they will not sh...

Hi all I have no idea regarding low level hardware. I should firgure out something about ALTERA ACEX. Question is like following. 1.Are...

Hi all I have no idea regarding low level hardware. I should firgure out something about ALTERA ACEX. Question is like following. 1.Are the FPGA configuration data and the firmware different? 2.How can I extract FPGA configuration data from ALTERA ACEX to my PC? 3.How can I extract firmware in EEPROM to my PC? P.S What I want to do finally is extrating data from FPGA and EEPROM and ...