Hello, Reading the SAM7 datasheet's chapter on embedded flash I ran across this snippet: "Access to the Flash in read mode is permitted...

Hello, Reading the SAM7 datasheet's chapter on embedded flash I ran across this snippet: "Access to the Flash in read mode is permitted when a Lock or Unlock command is performed ... Access to the Flash in read mode is permitted when a Set, Clear or Get General-purpose NVM bit cmmand is performed" Does this imply that: 1) C-functions implementing Lock/Unlock/Set/Clear do not need to...

There is a system with ADI BlackFin DSP which boots up from SPI flash. The flash contains the standard ADI boot stream. I would like to...

There is a system with ADI BlackFin DSP which boots up from SPI flash. The flash contains the standard ADI boot stream. I would like to insert hw/sw version number, build number, release date and some other information into the flash. This information should be accessible to a program running on Blackfin. Also, the flash programming tools should be able to read this information from t...

We are moving from a parallel flash which is mapped to the address space of the processor to a serial flash, which requires the code to...

We are moving from a parallel flash which is mapped to the address space of the processor to a serial flash, which requires the code to be copied from sflash to internal RAM before the loader jumps to its entry point. The ROM loader is very simple: it merely copies the bytes to a location which is defined in a header at offset zero of the serial flash. I created a linker directives file to...

I'm looking for simple mean to program this microcontroller flash memory, without using any commercial products, if you have any...

I'm looking for simple mean to program this microcontroller flash memory, without using any commercial products, if you have any hint ... thanX hooga

Hi All: I am in the process of development of code with some for controlling some FPGA's, I am hitting a road block where the Flash Prom size...

Hi All: I am in the process of development of code with some for controlling some FPGA's, I am hitting a road block where the Flash Prom size is smaller than the code size. Can anyone let me know if there are any compression algorithms for compressing data into flash and decompress when loading it into the FPGA's... If there are any links I would appreciate if you could direct to them T...

We are not able to boot from NAND flash on our custom board with the following hardware. AT91SAM9263 ...

We are not able to boot from NAND flash on our custom board with the following hardware. AT91SAM9263 64 MB NAND flash (Page size: 512 byte + 16 byte). (Company: ST/numynox) 64 MB SDRAM 2. The Bootstrap and U-Boot is located in the NAND flash at the offsets 0x0 and 0x4000 respectively. 3. However, if the Bootstr...

Hi there, I'm looking for any reference source-code for NFTL (NAND Flash Translation Layer), algorithms for wear-leveling and bad...

Hi there, I'm looking for any reference source-code for NFTL (NAND Flash Translation Layer), algorithms for wear-leveling and bad block management for NAND flash with small memory footprints. Is there anyone out there who can help me on this? Thanks, (Nestor)

I have seen some stacked flash/ram memory modules available on various manufacturer websites. However all the modules are bga. Does anyone...

I have seen some stacked flash/ram memory modules available on various manufacturer websites. However all the modules are bga. Does anyone know if there are any that are any available in a LQFP or other leaded form. It would certainly make things easier for small microcontroller projects to have flash and ram in one chip.

Mem Map is not flat , you can move RAM to any address ! Typical 9 will have internal Flash memory I-TCM = execution opcode ...

Mem Map is not flat , you can move RAM to any address ! Typical 9 will have internal Flash memory I-TCM = execution opcode and D-TCM = Not execute , data only . flash mem . loader is in I-TCM , 128KB flash . part of Flash is mapped to D-TCM , to boot ARM . the rest is mapped to Data mem ( Data-Titely-Coupled-Mem). if you DISABLE it , no prob...

Hi all, Our MPC8548E is having problems loading the DDR2 memory (boot) from the driver burned on the flash. The DDR interface and flash...

Hi all, Our MPC8548E is having problems loading the DDR2 memory (boot) from the driver burned on the flash. The DDR interface and flash interface (LBC) were tested stand alone and found to be working properly. Errors accour only when writing the DDR from the flash and it happens (the error) at the same data sequence every time. When we changed the code a little bit and this data shifted to ...

Hi, I am currently looking into the IAP features of the Atmel AT89C51CC03, and having difficulty understanding (or finding information) on...

Hi, I am currently looking into the IAP features of the Atmel AT89C51CC03, and having difficulty understanding (or finding information) on the performance. As far as I can tell, the user application sets up the data to be written to flash, along with the page and byte address, and then calls the AIP API which resides in a seperate flash array (FM1). This API actually performs the flash ...

I just tried to find some str711 documents and it appears st.com is now a flash only website. :-( It also looks like ST have broken many of the...

I just tried to find some str711 documents and it appears st.com is now a flash only website. :-( It also looks like ST have broken many of the related documents page links in the process. Can anyone confirm this and do you know of a non-flash version of the ST microcontroller website ? Thanks, Simon. -- Simon Clubley, clubley@remove_me.eisner.decus.org-Earth.UFP Microsoft: Bring...

Hi, I am running an application in RAM . This application un-tar's a 'files.tar' file and puts the un-tarred files in the FLASH memory of...

Hi, I am running an application in RAM . This application un-tar's a 'files.tar' file and puts the un-tarred files in the FLASH memory of my board. After this, my application clears the flash memory in 2 minutes and makes the FLASH Memory empty . Now, the application onceagain un-tars the 'files.tar' file . The files are placed in the FLASH Memory by the application and the whole of the...

I have a board with Cortex-M3 NXP LPC1875 MCU with 512kB internal Flash, one 8MB external SDRAM and 2MB external SPI Flash. The external Flash...

I have a board with Cortex-M3 NXP LPC1875 MCU with 512kB internal Flash, one 8MB external SDRAM and 2MB external SPI Flash. The external Flash is connected to a normal SPI, not SPIFI (in other words, it isn't mapped to the internal address space). Insted the SDRAM is mapped to the internal address space, starting from address 0xA000 0000. The application will use a 480x272 RGB LCD conne...

Atmel has a press release out for an ARM9 product line that includes on chip Flash. I have looked at their web site and I don't see...

Atmel has a press release out for an ARM9 product line that includes on chip Flash. I have looked at their web site and I don't see anything about this other than the press release. At the bottom of the release they refer to the SAM9260 on their web site, but this part has no on chip Flash. Is this the 0 kB version of a family with Flash? Or are they no where near silicon on the part they...

Hi All, Where it is preferable to store log/history parameters: in FLASH or in on-chip EEPROM ? I am using AT89C51ED2 8-bit MCU from...

Hi All, Where it is preferable to store log/history parameters: in FLASH or in on-chip EEPROM ? I am using AT89C51ED2 8-bit MCU from Atmel. It has 2k EEPROM on-chip and 64kB Flash. EEPROM programming features: 1) On-chip 2048 Bytes EEPROM. 2) Supports only Byte programming ( no page programming). 3) Programming of each byte 10msec-17msec(Atmel says). 4) 100K write cycles. Flash progr...

Maybe someone remember the thread[1] that I created some months ago. I was searching a simple way to save on the external SPI Flash some...

Maybe someone remember the thread[1] that I created some months ago. I was searching a simple way to save on the external SPI Flash some constant data (mainly bitmaps) and copying them to SDRAM at startup. I finally put my hands on that project again and I think I've found a good solution. The MCU (LPC1785 from NXP) has an internal Flash memory starting from 0x0000 0000 and an extern...

Hi, I have a datalogger with an eeprom memory, and i want to upgrade it to a serial flash memory. the problem is that when the memory is full it...

Hi, I have a datalogger with an eeprom memory, and i want to upgrade it to a serial flash memory. the problem is that when the memory is full it will start writing at the begining of the memory, and thats ok with the eeprom, but with the flash i will have to erase the whole block, so that its not ok. the message that im writing its 16 Bytes Long. anyone can help me with that? Thank you! ...

Hi guys. I am looking for the information about the flash memory. but i read a article from the below link. ...

Hi guys. I am looking for the information about the flash memory. but i read a article from the below link. http://www.bellevuelinux.org/flash_memory.html It said , NOR can do random-acess on read and write. NAND, however, its input/output interface allows only sequential access to data. is that true? so with NAND flash how can you find out your data? just do sequestial searching??? to...

Hi everyone, We have ~128Mbit of configuration to be stored in a Flash device and for reasons related to qualification (HiRel application) we...

Hi everyone, We have ~128Mbit of configuration to be stored in a Flash device and for reasons related to qualification (HiRel application) we are more inclined to the use of NAND technology instead of NOR. Unfortunately NAND flash suffers from bad blocks, which may also develop during the lifetime of the component and have to be handled. I've read something about bad block management...