UART receive ISR receives 1st 2 bytes twice

Started by galapogos in comp.arch.embedded13 years ago 22 replies

Hi, I'm trying to read data from a smart card via a Toshiba 16bit MCU's UART interface set at a slow 4+K baudrate. My receive ISR however...

Hi, I'm trying to read data from a smart card via a Toshiba 16bit MCU's UART interface set at a slow 4+K baudrate. My receive ISR however seems to pull out the 1st 2 bytes of the transmission from the receive buffer twice. i.e., when the smart card sends 0x1, 0x2, 0x3, ..., 0xa, My receive ISR will receive 0x1, 0x2, 0x1, 0x2, 0x3, ...,0xa. I've checked the I/O line with a logic analyzer an...


ISR in SoC

Started by star...@gmail.com in comp.arch.embedded11 years ago

Hi all, My name is Ravi. I am working on system integration and testing. I am using SDCC compiler for my C code compilation. I have...

Hi all, My name is Ravi. I am working on system integration and testing. I am using SDCC compiler for my C code compilation. I have different peripheral module like i2c, spi, uart, memory controller, lcd. Inside ISR, based on status of interrupt controller i am setting flags, and based on these flag i want to call some functions to reconfigure the peripherals. So where do i need to write tho...


One of the 200 interrupts does not get executed sometimes due to a single statement

Started by karthikbg in comp.arch.embedded12 years ago 24 replies

Hi, 1) I have 200 interrupts and the corresponding Interrupt service routines for those. ISR () { If (INTERRUPT_FLAG == 1) ...

Hi, 1) I have 200 interrupts and the corresponding Interrupt service routines for those. ISR () { If (INTERRUPT_FLAG == 1) DO_ISR_ACTIVITY INTERRUPT_FLAG = 0; } When i am doing the 'INTERRUPT_FLAG=0' in the above code, One of the interrupt gets fired, but not handled as it is at the end of ISR. How to avoid this. But, the clearing of the 'INTERRUPT_FLAG = 0' is req...


Making a function safe for use in an ISR

Started by joshc in comp.arch.embedded12 years ago 22 replies

So during an interview for an embedded software position, I was asked to write any function I wanted in C. I chose an iterative...

So during an interview for an embedded software position, I was asked to write any function I wanted in C. I chose an iterative factorial function like this: int iterative_factorial(int i) { int f; f = 1; while (i != 0) { f = i * f; i--; } return(f); } I was then asked what I would have to worry about or fix to make the function safe to use in an ISR. I really ...


switching context on MSP430

Started by brOS in comp.arch.embedded10 years ago 18 replies

Hi all, I am working on a small RTOS for MSP430. It should just provide scheduler with ability to switch and change context.... Of course I...

Hi all, I am working on a small RTOS for MSP430. It should just provide scheduler with ability to switch and change context.... Of course I have system tick ISR which is handling ticks. And here is the thing...When I take a look in disassembly, it says that before msp430 enters system tick ISR it pushes registers R15,R14,R13 and R12(and of course PC and SR) on stack. So I used that for context...


switching context on MSP430

Started by brOS in comp.arch.embedded10 years ago 1 reply

Hi all, I am working on a small RTOS for MSP430. It should just provide scheduler with ability to switch and change context.... Of course I...

Hi all, I am working on a small RTOS for MSP430. It should just provide scheduler with ability to switch and change context.... Of course I have system tick ISR which is handling ticks. And here is the thing...When I take a look in disassembly, it says that before msp430 enters system tick ISR it pushes registers R15,R14,R13 and R12(and of course PC and SR) on stack. So I used that for context...


68332 horrible crash

Started by John Larkin in comp.arch.embedded10 years ago 10 replies

Situation: an FPGA drives the IRQ6 input, the portF pin. It's set up to use another chip select as the autovector generator. This mostly works....

Situation: an FPGA drives the IRQ6 input, the portF pin. It's set up to use another chip select as the autovector generator. This mostly works. The FPGA pulls it low, the ISR runs, and the ISR pokes the FPGA to release (raise) the interrupt request pin before it exits. But sometimes the firmware wants to shut down the associated subsystem so tells the fpga to clear the interrupt request, wh...


Nesting interrupts in 8051

Started by Anonymous in comp.arch.embedded13 years ago 2 replies

If the 8051chip is servicing a lower priority interrupt and I want it to be interrupted by a higher priority interrupt, do I have to...

If the 8051chip is servicing a lower priority interrupt and I want it to be interrupted by a higher priority interrupt, do I have to enable interrupts - EA = 1 - as sson as I enter lower priority ISR. In other words, does the 8051 disables all interrupts when it enters an ISR ?


ISR problem in MSP430 using IAR

Started by Mike V. in comp.arch.embedded15 years ago 5 replies

When my ISR looks like this, all is fine: #pragma vector=0x00 __interrupt void basic_timer(void) { LPM3_EXIT; /* exit from low power...

When my ISR looks like this, all is fine: #pragma vector=0x00 __interrupt void basic_timer(void) { LPM3_EXIT; /* exit from low power mode 3 */ } However, when I attempt to place ANY extra lines of code in the basic_timer() function, then I get the following error: "Error[e16]: Segment CODE (size: 0x1008 align: 0x1) is too long for segment definition. At least 0x4a more bytes n...


interrupt latency

Started by Anonymous in comp.arch.embedded12 years ago 14 replies

Just a generic question regarding interrupt latency. I am using a periodic timer which generates an interrupt at every clock tick. The question...

Just a generic question regarding interrupt latency. I am using a periodic timer which generates an interrupt at every clock tick. The question I have is will the interrupt latency cause the timer interrupt service routine to run at a reduced frequency. What I mean here is as follows. Consider a simple isr routine as shown below, void isr() { t = timestamp(); } Assume the above ...


problem in external interrupt handling in ARM LPC2138

Started by abhay in comp.arch.embedded12 years ago 3 replies

hiiii i am using ARM LPC2138 for my application.For one of my devices i am using its external interrupt pin .i am compliling my code in...

hiiii i am using ARM LPC2138 for my application.For one of my devices i am using its external interrupt pin .i am compliling my code in ARM mode.i am able to compile my code in KEIL as well as GCC without any warning.i am printing some values in my ISR routine. the problem is: After executing the isr the system halts. Please suggest what could be the problem. i am initialising my ext...


interrupt question

Started by John in comp.arch.embedded13 years ago 7 replies
ISR

If CPU is servicing a pin 5 interrupt in ISR, and there is another interrupt pin 3 (with higher priority) comes in. Will CPU stops servicing a...

If CPU is servicing a pin 5 interrupt in ISR, and there is another interrupt pin 3 (with higher priority) comes in. Will CPU stops servicing a pin 5 interrupt and handles interrupt pin 3 first? Or it will wait until pin 5 ISR is done? please advice. thanks...


USB transfer for DE2 board

Started by summer5 in comp.arch.embedded9 years ago

hi, I'm modifying the coding from DE2 board CD -> DE2_demonstrations -> DE2_NIOS_DEVICE_LED. For the firmware of device controller for...

hi, I'm modifying the coding from DE2 board CD -> DE2_demonstrations -> DE2_NIOS_DEVICE_LED. For the firmware of device controller for ISP1362 chip, there got six related coding: MAINLOOP.C, CHAP_9.C, D13BUS.C, HAL4SYS.C, HAL4D13.C AND ISR.C. Where HAL4SYS.C and HAL4D13.C is hardware abstraction layer; ISR.C is interrupt service routine; CHAP_9.C and D13BUS.C is protocol layer; MAINLOOP.


Accessing global var of another file

Started by galapogos in comp.arch.embedded13 years ago 9 replies

Hi, I have a multi-file project and in main.c I have a global array to store a string of characters. In my main function I call...

Hi, I have a multi-file project and in main.c I have a global array to store a string of characters. In my main function I call function i2c_send from another file(i2c.c) that sends this string over i2c. Naturally, my i2c isr is in i2c.c, and naturally it needs to write the string into the i2c buffer for the transmission to begin. Since I can't pass the string into the isr as a parameter, ...


Help with interrupt software routine and non-atomic operations

Started by pozz in comp.arch.embedded3 years ago 29 replies

I have an ISR that uses a struct with two members: struct mystruct { const void *data; size_t size; } *curr, *next, curr_s,...

I have an ISR that uses a struct with two members: struct mystruct { const void *data; size_t size; } *curr, *next, curr_s, next_s; void ISR(void) { static const unsigned char *d; if (next) { *curr = *next; next = NULL; d = curr-> data; } if (curr) { /* Process curr structure, byte by byte */ ... if (d - (const unsigned char *)curr-


SMI in Linux

Started by JC in comp.arch.embedded15 years ago 1 reply

Hi, Can someone kind enough to show me some pointer about how to setup SMI (Pentium) in Linux? (install ISR) Anyone know which file does the...

Hi, Can someone kind enough to show me some pointer about how to setup SMI (Pentium) in Linux? (install ISR) Anyone know which file does the NMI setup? (irq_request()) Thanks.


Handler syntax with high level languages

Started by bruce varley in comp.arch.embedded15 years ago 2 replies
ISR

What sort of syntax do C and similar 'high level' platforms have for dealing with asynchronous structures like custom interrupt handlers? Could...

What sort of syntax do C and similar 'high level' platforms have for dealing with asynchronous structures like custom interrupt handlers? Could anyone show me a code sample of, say, setting up an ISR that triggers on a timer?


Foreground vs. Background (Nomenclature Question)

Started by David T. Ashley in comp.arch.embedded13 years ago 47 replies

There are ISRs (interrupt service routines), and software that is not part of an ISR. One of those is foreground, and one is...

There are ISRs (interrupt service routines), and software that is not part of an ISR. One of those is foreground, and one is background. But, which is which? What is the right nomenclature? What is the definitive reference for the right nomenclature? Thanks, Dave.


Crossworks & Interrupts

Started by stephenl in comp.arch.embedded7 years ago 2 replies

Hello I'm new to both ARM and Crossworks and trying to understand interrupts, i order to do so, i've created a small serial program to echo...

Hello I'm new to both ARM and Crossworks and trying to understand interrupts, i order to do so, i've created a small serial program to echo characters received, however it never seems to call the ISR. Ive tried adding VECTORED_IRQ_INTERRUPTS and STARTUP_FROM_RESET to the Preprocessor Definitions section of the startup.s file... I would appreciate a little guidance Program as follows :- ...


Memory Partitioning Problems

Started by Karl-Heinz Rossmann in comp.arch.embedded13 years ago 8 replies

Hi all, I have an embedded system which is required to have memory partitioning due to safety reasons. Unfortunately there are sporadically...

Hi all, I have an embedded system which is required to have memory partitioning due to safety reasons. Unfortunately there are sporadically bus address error exceptions. I am using a Motorola M68376 as a foreground/background system but I think it's no problem of the microprocessor. There are three asynchronous interrupt sources. Each of them has a different ISR assigned. The principle st...