Debugging by bsing SW interrupts instead of HW interrupts

Started by Anonymous in comp.arch.embedded15 years ago 4 replies

My problem is to test my driver software ,but the asic chip is not ready yet.I can simulate the registers of the asic easyly,but the HW...

My problem is to test my driver software ,but the asic chip is not ready yet.I can simulate the registers of the asic easyly,but the HW interrupts which will be generated by asic chip is necessary to test my interrupt handler and interrupt driven SW. For X86 processor I know that also SW interrupt generation is possible but how? How should I write interrupt handler for a SW interrupt? Does...


software & hardware interrupts

Started by ishita in comp.arch.embedded14 years ago 16 replies

Hi all, I want to know exact difference between software interrupts and hardware interrupts. I also want to know whether timer interrupt in...

Hi all, I want to know exact difference between software interrupts and hardware interrupts. I also want to know whether timer interrupt in 8051 is a software interrupt or a hardware interrupt. Best regards, Ishita


atomic test_and_set on ADSP21020

Started by alb in comp.arch.embedded8 years ago 30 replies

Hi everyone, I'm trying to implement a locking mechanism without the need to disable the interrupts (and yes, I know I can do this disabling...

Hi everyone, I'm trying to implement a locking mechanism without the need to disable the interrupts (and yes, I know I can do this disabling interrupts) and I thought about a 'test-and-set' function which will atomically set the lock which will then be released at the end of the critical section. Does anybody know about an implementation with the target's Instruction Set? I found in the...


Crossworks & Interrupts

Started by stephenl in comp.arch.embedded8 years ago 2 replies

Hello I'm new to both ARM and Crossworks and trying to understand interrupts, i order to do so, i've created a small serial program to echo...

Hello I'm new to both ARM and Crossworks and trying to understand interrupts, i order to do so, i've created a small serial program to echo characters received, however it never seems to call the ISR. Ive tried adding VECTORED_IRQ_INTERRUPTS and STARTUP_FROM_RESET to the Preprocessor Definitions section of the startup.s file... I would appreciate a little guidance Program as follows :- ...


Masking/Disabling/Missing interrupts

Started by joshc in comp.arch.embedded13 years ago 3 replies

I know this is implementation specific but to make it a little less ambiguous let's deal with an XScale or any ARM core for that matter. Under...

I know this is implementation specific but to make it a little less ambiguous let's deal with an XScale or any ARM core for that matter. Under what conditions would you _miss_ interrupts? Let's say I have a UART that only generates one interrupt to the interrupt controller but the source of this interrupt within the UART can be due to various reasons. For example, maybe there is a FIFO overfl...


Interrupts on a PIC18

Started by Ron Blancarte in comp.arch.embedded13 years ago

Ok, I THOUGH I was following the C18 compiler User guide to a T, but I am having trouble getting the interrupts to work right. I am working...

Ok, I THOUGH I was following the C18 compiler User guide to a T, but I am having trouble getting the interrupts to work right. I am working with a PICDEM HPC, which has a 18F8722 as the main chip, I am just trying something simple to get an understanding of their interrupt system. The HPC demo board has 8 LEDs on PortD, the code powers every other LED 1010 1010. When I don't include t...


AVR-gnuC interrupt handler question

Started by Fred Bartoli in comp.arch.embedded14 years ago 8 replies

Hello, I'm definitely not a C programmer so the answer is probably obvious, but anyway here is my question: I've a small 4x2 keyboard that's...

Hello, I'm definitely not a C programmer so the answer is probably obvious, but anyway here is my question: I've a small 4x2 keyboard that's handled through interrupts. Each of the 2 columns is connected to an IT input (resp. INT0 & INT1) I want to serve both interrupts through the same handler. I'm using WinAVR and AVR-libc, so I have something like the following snippet: #include...


Help with interrupts please

Started by panfilero in comp.arch.embedded13 years ago 4 replies

Hello I'm having a heck of a time trying to get interrupts to work on my MCU. All my coding is in C, and basically I want to jump to an...

Hello I'm having a heck of a time trying to get interrupts to work on my MCU. All my coding is in C, and basically I want to jump to an isr whenever I sense something in my serial port. So I wrote a function like this: interrupt 20 void isr(void) {....} the function just spits out some characters to let me know it's ok. I found the number 20 in my data sheet listed as the "Vector N...


voltage threshold for interrupts

Started by Lin Gu in comp.arch.embedded16 years ago 8 replies

Hi, I am designing a module where low voltage threshold for interrupts are desirable. A high of 0.5V and low of 0.2V are ideal but I am not...

Hi, I am designing a module where low voltage threshold for interrupts are desirable. A high of 0.5V and low of 0.2V are ideal but I am not sure if current interrupt hardware can distinguish this kind of subtle difference.I would appreciate it if anybody could tell me whether this is possible, or how difficult it may be, or some reference systems which has implemented such low voltage-thre...


One of the 200 interrupts does not get executed sometimes due to a single statement

Started by karthikbg in comp.arch.embedded13 years ago 24 replies

Hi, 1) I have 200 interrupts and the corresponding Interrupt service routines for those. ISR () { If (INTERRUPT_FLAG == 1) ...

Hi, 1) I have 200 interrupts and the corresponding Interrupt service routines for those. ISR () { If (INTERRUPT_FLAG == 1) DO_ISR_ACTIVITY INTERRUPT_FLAG = 0; } When i am doing the 'INTERRUPT_FLAG=0' in the above code, One of the interrupt gets fired, but not handled as it is at the end of ISR. How to avoid this. But, the clearing of the 'INTERRUPT_FLAG = 0' is req...


Polling vs. Interrupts in counting pulses - what is better?

Started by ElderUberGeek in comp.arch.embedded14 years ago 5 replies

Hi. When counting pulses using a microcontroller (say from an encoder or pulse generator), there are two methods: polling and using interrupts....

Hi. When counting pulses using a microcontroller (say from an encoder or pulse generator), there are two methods: polling and using interrupts. Two alternative designs can be used (well, at least), one is to have the Microcontroller do it directly, and the other is to use a dedicated chip to do it. The concern is of course that the microcontroller might miss pulses if it is loaded with other ...


How interrrupts are handled (works) ? (internally)

Started by visweswara in comp.arch.embedded14 years ago 5 replies

Hi, I have a fundamental question of how interrupts in uC/uPs actually works? Many tell what happens when interrupts occur , like the...

Hi, I have a fundamental question of how interrupts in uC/uPs actually works? Many tell what happens when interrupts occur , like the program flow changes from the main program to ISR. But how exactly this happens without the interference of CPU? What I understand is interrupt gets the attention of CPU without CPU keeping watch over Interrupt Signal. How is this done. I hope interrupt c...


AT91RM9200: PIO: im getting two interrupts when i press the switch once :-(

Started by Mayank Kaushik in comp.arch.embedded15 years ago 6 replies

Hi, im learning how to use the AT91RM9200..right now im trying to tackle the AIC. iv set everyhting up, earmarking PIOA0 for an...

Hi, im learning how to use the AT91RM9200..right now im trying to tackle the AIC. iv set everyhting up, earmarking PIOA0 for an external interrupt through a switch connected to it, so that theoretically whenever the switch is pressed, an interrupt is generated that sends a string via the debug port to hyperterminal. everythings fine, but when i press the switch once, i get 2 interrupts....


To queue or not to queue

Started by Ivanna Pee in comp.arch.embedded13 years ago 3 replies

Hey group, I recently started a new job where the target is a handheld device with 3 buttons on it and a few other internal interrupts,...

Hey group, I recently started a new job where the target is a handheld device with 3 buttons on it and a few other internal interrupts, occurring maybe only every 125ms when it is in a real processing mode, with little processing to do to service the interrupts. The system runs on a low power controller and goes to low power mode whenever possible. It is implemented as a state machine, with...


Omap5912 Wdog timer

Started by nesta in comp.arch.embedded11 years ago

Hi, I've been pondering on using the 32Khz watchdog timer in Omap5912. I'm not sure if it is supported in 5912. Any one has been successful...

Hi, I've been pondering on using the 32Khz watchdog timer in Omap5912. I'm not sure if it is supported in 5912. Any one has been successful in using a watchdog timer on omap5912. Issues: As per the Literature Number: SPRU759A, I am able use the 32-bit wdog timer, however after the system reboots the interrupts are all disabled and there is no way to enable these interrupts and hence th...


[cross-post] nested interrupts

Started by alb in comp.arch.embedded8 years ago 43 replies

Dear all, I would like to understand more about nested interrupts since it looks to me they break my code and I'm not sure why. I have...

Dear all, I would like to understand more about nested interrupts since it looks to me they break my code and I'm not sure why. I have three 'items' in my software: a serial port, a fifo and a timer. The serial port is an external hardware that sends back an interrupt when it's free to send another byte, so I decided to have an interrupt service routine (ISR) that reads from the fifo and...


[Second solution: disabling interrupts] Re: Help with interrupt software routine and non-atomic operations

Started by pozz in comp.arch.embedded4 years ago 1 reply

I admit that following code instruction by instruction for checking if an interrupt trigger could bring to problems is tricky. The use of a...

I admit that following code instruction by instruction for checking if an interrupt trigger could bring to problems is tricky. The use of a double buffer (next1_s and next2_s) is obscure at first. Maybe it could be simpler to disable and enable interrupts, without worrying about next pending audio stream. --- audio.c --- typedef struct { const uint16_t *samples; size_t size; ...


How can this wild interrupt occur?

Started by Chris Carlen in comp.arch.embedded15 years ago 1 reply

Hi: I am trying to selectively disable an interrupt during a sequence of code where I don't want that interrupt to occur, on a TMS320F2812...

Hi: I am trying to selectively disable an interrupt during a sequence of code where I don't want that interrupt to occur, on a TMS320F2812 DSP. The interrupt is CPU Timer0, and the code of interest is within another interrupt, EVB Timer4's compare match interrupt. This T4CINT ISR must be preemptable by EVA Timer2 interrupts, so I cannot globally disable interrupts here. Just need to...


spurious timer overflow interrupt issue

Started by msg in comp.arch.embedded13 years ago

Greetings: I don't expect that current readers of this newsgroup will have direct experience with this issue but I could be surprised :-) I...

Greetings: I don't expect that current readers of this newsgroup will have direct experience with this issue but I could be surprised :-) I will appreciate related answers in any case. I have a problem with software timer interrupt status on the i8096; 's/w timer 0' interrupts are replaced by 'timer1 overflow' interrupts (as determined by the status in IOS1) on average between 7 and 15 ...


MSP430 / Interrupts / Status Register

Started by chrisfrommunich in comp.arch.embedded16 years ago 3 replies

try twice... Hello to all, I have to programm a TI MSP430 in Forth. My problem is, that I'm not able to write in the status register or in...

try twice... Hello to all, I have to programm a TI MSP430 in Forth. My problem is, that I'm not able to write in the status register or in IE1. I can write in other control registers like the ADC12CTL1 e.g. but i can't handle the interrupts. I'm using the following forth code to call the command "DINT": code /DisableInt DINT RET end-code It also dosn't work when I'm using c...