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Masking/Disabling/Missing interrupts

Started by joshc in comp.arch.embedded17 years ago 3 replies

I know this is implementation specific but to make it a little less ambiguous let's deal with an XScale or any ARM core for that matter. Under...

I know this is implementation specific but to make it a little less ambiguous let's deal with an XScale or any ARM core for that matter. Under what conditions would you _miss_ interrupts? Let's say I have a UART that only generates one interrupt to the interrupt controller but the source of this interrupt within the UART can be due to various reasons. For example, maybe there is a FIFO overfl...


Interrupts on a PIC18

Started by Ron Blancarte in comp.arch.embedded17 years ago

Ok, I THOUGH I was following the C18 compiler User guide to a T, but I am having trouble getting the interrupts to work right. I am working...

Ok, I THOUGH I was following the C18 compiler User guide to a T, but I am having trouble getting the interrupts to work right. I am working with a PICDEM HPC, which has a 18F8722 as the main chip, I am just trying something simple to get an understanding of their interrupt system. The HPC demo board has 8 LEDs on PortD, the code powers every other LED 1010 1010. When I don't include t...


AVR-gnuC interrupt handler question

Started by Fred Bartoli in comp.arch.embedded18 years ago 8 replies

Hello, I'm definitely not a C programmer so the answer is probably obvious, but anyway here is my question: I've a small 4x2 keyboard that's...

Hello, I'm definitely not a C programmer so the answer is probably obvious, but anyway here is my question: I've a small 4x2 keyboard that's handled through interrupts. Each of the 2 columns is connected to an IT input (resp. INT0 & INT1) I want to serve both interrupts through the same handler. I'm using WinAVR and AVR-libc, so I have something like the following snippet: #include...


Help with interrupts please

Started by panfilero in comp.arch.embedded17 years ago 4 replies

Hello I'm having a heck of a time trying to get interrupts to work on my MCU. All my coding is in C, and basically I want to jump to an...

Hello I'm having a heck of a time trying to get interrupts to work on my MCU. All my coding is in C, and basically I want to jump to an isr whenever I sense something in my serial port. So I wrote a function like this: interrupt 20 void isr(void) {....} the function just spits out some characters to let me know it's ok. I found the number 20 in my data sheet listed as the "Vector N...


Interrupts: can be lost?

Started by pozz in comp.arch.embedded4 years ago 63 replies

https://www.safetty.net/download/pont_pttes_2001.pdf Page 13 Note carefully what this means! There is a common misconception among the...

https://www.safetty.net/download/pont_pttes_2001.pdf Page 13 Note carefully what this means! There is a common misconception among the developers of embedded applications that interrupt events will never be lost. This simply is not true. If you have multiple sources of interrupts that may appear at ?random? time intervals, interrupt responses can be missed: indeed, where there are


USART interrupt on transmission

Started by pozz in comp.arch.embedded2 years ago 4 replies

The UART/USART peripheral usually available in many microcontrollers triggers a few interrupts. Two of them are DRE (data register empty, as...

The UART/USART peripheral usually available in many microcontrollers triggers a few interrupts. Two of them are DRE (data register empty, as named in AVR documentation) and TXC (transmitter complete). The first can be used to feed the TX FIFO even during shifting out the last pushed data. Documentation usually lacks details on these interrupts, for example exactly WHEN they are trigg...


One of the 200 interrupts does not get executed sometimes due to a single statement

Started by karthikbg in comp.arch.embedded17 years ago 24 replies

Hi, 1) I have 200 interrupts and the corresponding Interrupt service routines for those. ISR () { If (INTERRUPT_FLAG == 1) ...

Hi, 1) I have 200 interrupts and the corresponding Interrupt service routines for those. ISR () { If (INTERRUPT_FLAG == 1) DO_ISR_ACTIVITY INTERRUPT_FLAG = 0; } When i am doing the 'INTERRUPT_FLAG=0' in the above code, One of the interrupt gets fired, but not handled as it is at the end of ISR. How to avoid this. But, the clearing of the 'INTERRUPT_FLAG = 0' is req...


Polling vs. Interrupts in counting pulses - what is better?

Started by ElderUberGeek in comp.arch.embedded18 years ago 5 replies

Hi. When counting pulses using a microcontroller (say from an encoder or pulse generator), there are two methods: polling and using interrupts....

Hi. When counting pulses using a microcontroller (say from an encoder or pulse generator), there are two methods: polling and using interrupts. Two alternative designs can be used (well, at least), one is to have the Microcontroller do it directly, and the other is to use a dedicated chip to do it. The concern is of course that the microcontroller might miss pulses if it is loaded with other ...


How interrrupts are handled (works) ? (internally)

Started by visweswara in comp.arch.embedded17 years ago 5 replies

Hi, I have a fundamental question of how interrupts in uC/uPs actually works? Many tell what happens when interrupts occur , like the...

Hi, I have a fundamental question of how interrupts in uC/uPs actually works? Many tell what happens when interrupts occur , like the program flow changes from the main program to ISR. But how exactly this happens without the interference of CPU? What I understand is interrupt gets the attention of CPU without CPU keeping watch over Interrupt Signal. How is this done. I hope interrupt c...


AT91RM9200: PIO: im getting two interrupts when i press the switch once :-(

Started by Mayank Kaushik in comp.arch.embedded19 years ago 6 replies

Hi, im learning how to use the AT91RM9200..right now im trying to tackle the AIC. iv set everyhting up, earmarking PIOA0 for an...

Hi, im learning how to use the AT91RM9200..right now im trying to tackle the AIC. iv set everyhting up, earmarking PIOA0 for an external interrupt through a switch connected to it, so that theoretically whenever the switch is pressed, an interrupt is generated that sends a string via the debug port to hyperterminal. everythings fine, but when i press the switch once, i get 2 interrupts....


To queue or not to queue

Started by Ivanna Pee in comp.arch.embedded17 years ago 3 replies

Hey group, I recently started a new job where the target is a handheld device with 3 buttons on it and a few other internal interrupts,...

Hey group, I recently started a new job where the target is a handheld device with 3 buttons on it and a few other internal interrupts, occurring maybe only every 125ms when it is in a real processing mode, with little processing to do to service the interrupts. The system runs on a low power controller and goes to low power mode whenever possible. It is implemented as a state machine, with...


[cross-post] nested interrupts

Started by alb in comp.arch.embedded12 years ago 43 replies

Dear all, I would like to understand more about nested interrupts since it looks to me they break my code and I'm not sure why. I have...

Dear all, I would like to understand more about nested interrupts since it looks to me they break my code and I'm not sure why. I have three 'items' in my software: a serial port, a fifo and a timer. The serial port is an external hardware that sends back an interrupt when it's free to send another byte, so I decided to have an interrupt service routine (ISR) that reads from the fifo and...


[Second solution: disabling interrupts] Re: Help with interrupt software routine and non-atomic operations

Started by pozz in comp.arch.embedded8 years ago 1 reply

I admit that following code instruction by instruction for checking if an interrupt trigger could bring to problems is tricky. The use of a...

I admit that following code instruction by instruction for checking if an interrupt trigger could bring to problems is tricky. The use of a double buffer (next1_s and next2_s) is obscure at first. Maybe it could be simpler to disable and enable interrupts, without worrying about next pending audio stream. --- audio.c --- typedef struct { const uint16_t *samples; size_t size; ...


How can this wild interrupt occur?

Started by Chris Carlen in comp.arch.embedded18 years ago 1 reply

Hi: I am trying to selectively disable an interrupt during a sequence of code where I don't want that interrupt to occur, on a TMS320F2812...

Hi: I am trying to selectively disable an interrupt during a sequence of code where I don't want that interrupt to occur, on a TMS320F2812 DSP. The interrupt is CPU Timer0, and the code of interest is within another interrupt, EVB Timer4's compare match interrupt. This T4CINT ISR must be preemptable by EVA Timer2 interrupts, so I cannot globally disable interrupts here. Just need to...


spurious timer overflow interrupt issue

Started by msg in comp.arch.embedded17 years ago

Greetings: I don't expect that current readers of this newsgroup will have direct experience with this issue but I could be surprised :-) I...

Greetings: I don't expect that current readers of this newsgroup will have direct experience with this issue but I could be surprised :-) I will appreciate related answers in any case. I have a problem with software timer interrupt status on the i8096; 's/w timer 0' interrupts are replaced by 'timer1 overflow' interrupts (as determined by the status in IOS1) on average between 7 and 15 ...


MSP430 / Interrupts / Status Register

Started by chrisfrommunich in comp.arch.embedded20 years ago 3 replies

try twice... Hello to all, I have to programm a TI MSP430 in Forth. My problem is, that I'm not able to write in the status register or in...

try twice... Hello to all, I have to programm a TI MSP430 in Forth. My problem is, that I'm not able to write in the status register or in IE1. I can write in other control registers like the ADC12CTL1 e.g. but i can't handle the interrupts. I'm using the following forth code to call the command "DINT": code /DisableInt DINT RET end-code It also dosn't work when I'm using c...


microcontroller AT89S52 programing advice

Started by bromio in comp.arch.embedded18 years ago 5 replies

im required to make a digital clock , i made several codes using iteration for delay which give not perfect delay. So i want to have suggestion...

im required to make a digital clock , i made several codes using iteration for delay which give not perfect delay. So i want to have suggestion about how to use timer interrupts to have perfect 1 sec delay each time. ive written code please see am i using interrupts correctly.. #include #include unsigned char LED[10]={0x3F,0x06,0x5B,0x4F,0x66,0x6D,125,0x07,0x7F,111};


problem with interrupt after soft reset

Started by wanwan in comp.arch.embedded17 years ago 1 reply

I'm programming an ARM7 microcontroller with embedded C using an IDE. Everything works fine initially after loading the program. When I...

I'm programming an ARM7 microcontroller with embedded C using an IDE. Everything works fine initially after loading the program. When I press soft reset, the interrupts stop working. I tried the example codes for the microcontroller that involve interrupts and had the same results: works for the first time after loading and stops working after soft reset. Is there anything different runn...


IRQ assigning for PCI card in SMP linux system ( Dual core )

Started by mahi in comp.arch.embedded14 years ago 1 reply

Hi All, For my PCI card i can able to read the IRQ line in single core system, using PCI_INTERRUPT_LINE.And using that IRQ line i am...

Hi All, For my PCI card i can able to read the IRQ line in single core system, using PCI_INTERRUPT_LINE.And using that IRQ line i am getting Interrupts But on SMP systems, i can albe to read IRQ line but i am not getting Interrupts.....because... the assigned IRQ is not equal to which i have requested. if i type "lspci -vvx" i am getting another IRQ Line , which is not equal...


PIC MSSP module in I2C mode

Started by Ralf Hildebrandt in comp.arch.embedded20 years ago 2 replies

Hi all! The Microchip PIC16F87XA has got a MSSP module. Bits SSPM(3 downto 0) in SSPCON register configure the mode of the module. For I2C...

Hi all! The Microchip PIC16F87XA has got a MSSP module. Bits SSPM(3 downto 0) in SSPCON register configure the mode of the module. For I2C operation the following options are available: 1111 = I2C slave, 10bit addressing, with START/STOP interrupts 1110 = I2C slave, 7bit addressing, with START/STOP interrupts 1011 = I2C firmware controlled master mode (Slave idle) 1000 = I2C master ...