gnu compiler optimizes out "asm" statements

Started by Tim Wescott in comp.arch.embedded5 years ago 52 replies

This is related to my question about interrupts in an STM32F303 processor. It turns out that the problem is in the compiler (or I'm going...

This is related to my question about interrupts in an STM32F303 processor. It turns out that the problem is in the compiler (or I'm going insane, which is never outside the realm of possibility when I'm working on embedded software). I'm coding in C++, and I'm using a clever dodge for protecting chunks of code from getting interrupted. Basically, I have a class that protects a block...


MSP430, gcc -> IAR

Started by Baxter in comp.arch.embedded15 years ago 6 replies

I'm an experienced C/C++ programmer, but very new to Embedded programming. I've bought the TI Flash developers kits that include the IAR...

I'm an experienced C/C++ programmer, but very new to Embedded programming. I've bought the TI Flash developers kits that include the IAR compiler. I have some existing msp430gcc code, but there are some differences - particularly in how interrupts are declared. The issues I need to resolve: 1) some of my interrupt routines are declared as "wakeup". It's unclear to me how to handle th...


Speaking of Multiprocessing...

Started by rickman in comp.arch.embedded3 years ago 40 replies

I recall a discussion about the design of an instruction set architecture where someone was saying an instruction was required to test and set...

I recall a discussion about the design of an instruction set architecture where someone was saying an instruction was required to test and set a bit or word as an atomic operation if it was desired to support multiple processors. Is this really true? Is this a function that can't be emulated with other operations including the disabling of interrupts? -- Rick C


Intel 386EXTC interrupts

Started by Anonymous in comp.arch.embedded15 years ago 1 reply

Hi, Can someone suggest how to use Intel 386EXTC interrupt lines. If I send an interrupt signal on say INT6 line what should I expect? Do...

Hi, Can someone suggest how to use Intel 386EXTC interrupt lines. If I send an interrupt signal on say INT6 line what should I expect? Do I have to write Interrupt service routine? How can I do that? And where will that be stored? Any suggestions are appreciated. Thanks Learner


Help with small kernel..

Started by Anonymous in comp.arch.embedded16 years ago 13 replies

Hi, I'm writing a little "kernel" for a small microprocessor. Right now it just implements tasks, and does scheduling. That is , I have a timer...

Hi, I'm writing a little "kernel" for a small microprocessor. Right now it just implements tasks, and does scheduling. That is , I have a timer fire every ms in which the interrupt handler sets up the kernel stack and pc, and the "kernel" merly checks if the current task has reached its timeslice. Now I want to do some abstractios over events.For now interrupts, but have no idea what that ta...


Polling a Port Pin for a specific amount of time

Started by as1 in comp.arch.embedded12 years ago 5 replies

Hello all, I hope someone can help me as I am tackling my first ever work project with 8051 and my previous experience is .....absolutely...

Hello all, I hope someone can help me as I am tackling my first ever work project with 8051 and my previous experience is .....absolutely nothing, zero. I need to poll a pin for 5 seconds, and take certain actions when it changes from high to low, but then go back to polling. Interrupts don't seem like an ideal solution since it will interfere with the polling process. How should I go about ...


CONFIG_HZ_1000 vs. CONFIG_HZ_250

Started by Washington Ratso in comp.arch.embedded11 years ago 3 replies

I have changed my Linux 2.6.26 configuration from 250 HZ to 1000 HZ to get more samples when using oprofile in timer interrupt mode. ...

I have changed my Linux 2.6.26 configuration from 250 HZ to 1000 HZ to get more samples when using oprofile in timer interrupt mode. Besides increasing the number of timer interrupts, are there other effects from increasing HZ from 250 to 1000?


MSP430 Interrupts/Status Register

Started by chrisfrommunich in comp.arch.embedded16 years ago 1 reply

Hello to all, I have to program a TI MSP430 in Forth. My problem is that I'm not able write in the SR and in the IE1 register. I can write in...

Hello to all, I have to program a TI MSP430 in Forth. My problem is that I'm not able write in the SR and in the IE1 register. I can write in other controlregisters like ADC12CTL1... etc. The following is teh code I'm using for the "DINT" command: code /DisInt


Recursion in HLL

Started by Erich78 in comp.arch.embedded11 years ago 18 replies

Is there a way to detect Recursion in High Level language like C ? We have had terrible Resets in the last Customer Release and I am being asked...

Is there a way to detect Recursion in High Level language like C ? We have had terrible Resets in the last Customer Release and I am being asked to analze Semaphore deadlocks, Nested Interrupts and Stack overrun issues. We suspect that there is recursion in our sources and am interested in detecting and cleaning up all recursion. Freeware would be preferred but Commercial tools could be considere...


TMS470 with IAR C++ Compiler

Started by Hagar in comp.arch.embedded11 years ago 8 replies

Hi all. I'm trying to use C++ and IAR for TMS470 uC's but I'm getting some weird troubles with C++. For example: I have a simple test code...

Hi all. I'm trying to use C++ and IAR for TMS470 uC's but I'm getting some weird troubles with C++. For example: I have a simple test code to receive CAN frames using interrupts. It compiles ok but when the frame arrives the application blows! If I use the same logic and configurations with C compiler everything works perfectly. I did a research for C++ Projects with TMS470 but didn't fi...


16F913 mind of it's own

Started by Anonymous in comp.arch.embedded13 years ago 4 replies

Using the simulator the program in question works sometimes and sometimes doesn't. I am trying to isolate a couple of problems as a last resort...

Using the simulator the program in question works sometimes and sometimes doesn't. I am trying to isolate a couple of problems as a last resort by placing an endless loop in the code (endhere. . . . goto endhere). But it breaks out of that. I've turned off the interrupts, they aren't used at all in the program. On the simulator it will jump to incorrect places from a certain point. It has gon...


Ho to detect phase shift in 2 square waves ?

Started by Rodo in comp.arch.embedded16 years ago 5 replies

Hi all... I have 2 square waves that are out of phase by 90 degrees. I want to be able to tell when the first wave shifts from "leading" to...

Hi all... I have 2 square waves that are out of phase by 90 degrees. I want to be able to tell when the first wave shifts from "leading" to "lagging". The second wave will do the opposite. I'm trying to do this in software. I have some ideas on how to do it with interrupts but I'd like to explore other possibilities. So, if someone can suggest where to dig out info on the subject. It wou...


SPI performance on Freescale MPC83xx?

Started by Matthias in comp.arch.embedded14 years ago 6 replies

Hi, In our project, due to some restrictions and requirements we would have to use the SPI of a Frescale MPC83xx for receiving a continous...

Hi, In our project, due to some restrictions and requirements we would have to use the SPI of a Frescale MPC83xx for receiving a continous stream of serial data at a bit rate of at least 500 kbps, but would like to use modes with up to 12 Mbps as well. As it seems, there is no DMA support for SPI, so we would have to spend CPU time for this (either via interrupts or via kind of polling)....


Interrupts in U-boot

Started by Nicholas Karsen in comp.arch.embedded16 years ago 1 reply

I am attempting to implement interrupt in u-boot, is there any example code. I have noticed that some of the code is implemented, however there...

I am attempting to implement interrupt in u-boot, is there any example code. I have noticed that some of the code is implemented, however there are messages which say there is no IRQ support in u-boot. What does this mean? What is the state of u-boot in this regard? It seems u-boot is slower than linux? Are there any reseaons an AT91RM9200 would work slower? Clearly thats my target. ...


interrupts with FX2

Started by jan0385 in comp.arch.embedded10 years ago 22 replies

Hello, do you know where I can find information about setting up an interrupt with the FX2? To my knowledge an ISR looks like: static...

Hello, do you know where I can find information about setting up an interrupt with the FX2? To my knowledge an ISR looks like: static void MyIsr(void) __interrupt 0 { // Clear global USB IRQ EXIF &= ~0x10; .. } But how do I tell the FX2 to run the ISR when the IRQ0 (INT0 pin) occurs? Best regards Jan --------------------------------------- Posted through h...


Self-waking PIC

Started by PigPOg in comp.arch.embedded15 years ago 4 replies

Hi all, Is there anyway that a PIC in sleep mode can wake-up periodically by way of an internal mechanism (say, every 30 seconds), perform a...

Hi all, Is there anyway that a PIC in sleep mode can wake-up periodically by way of an internal mechanism (say, every 30 seconds), perform a short routine and then re-enter Sleep again? I'm using a 16F505, but this has no interrupts so I was wondering if I could use the internal timer to implement this function? I know the wake-up on input change would suit but this would mean adding an ...


So... What are the alternatives? Was: I don't use an RTOS because...

Started by Elder Costa in comp.arch.embedded15 years ago 164 replies

I have followed the thread with a great dose of interest. Though a small system can be implemented with an infinite loop running the main tasks...

I have followed the thread with a great dose of interest. Though a small system can be implemented with an infinite loop running the main tasks and some interrupts to handle asynchronous events, I wonder how one could handle more complex systems with no RTOS (or at least a multithread cooperative scheduler) without getting into a big messy buggy code. I guess it is not an mission impossi...


I2C Problem

Started by Carmel in comp.arch.embedded13 years ago 4 replies

Hi all, I am trying to drive an I2C device from a windows CE board, unfortunately without success. I am trying the following...

Hi all, I am trying to drive an I2C device from a windows CE board, unfortunately without success. I am trying the following test program... void I2CStart() { // Initialize the unit // put slave address in ISAR g_wISAR = 0x20; // enable desired interrupts in ICR. // Arbitration loss detect interrupt NOT enabled g_wICR |= (ICR_ITEIE | ICR_IRFIE | ICR_BEIE | ICR_SSDIE | ICR_SADI...


Setting ARM CPSR to C variable

Started by Luken8r in comp.arch.embedded12 years ago 2 replies

Im using the TI Code Composer suite with an ARM 7 and Im looking for a way to get the CPSR back into a C variable. I was looking through...

Im using the TI Code Composer suite with an ARM 7 and Im looking for a way to get the CPSR back into a C variable. I was looking through the documentation that came with the compiler and it didnt have quite what I was looking for. What Im need to do is get the state of the interrupt disable bit. I need to use this bit as a condition variable for something like: === if (interrupts enabled){ ...


Causing an Interrupt on a event

Started by dimi...@gmail.com in comp.arch.embedded14 years ago 9 replies

Hello people, I'm wondering if someone can help me with internal interrupts. I'm using the PIC18f452 ADC to get a reading from a wall sensor...

Hello people, I'm wondering if someone can help me with internal interrupts. I'm using the PIC18f452 ADC to get a reading from a wall sensor (its an IR transmit receive circuit) which gives out numbers ranging from 0 to 500 (these numbers correspond to how far the sensor is from the wall). What I'm trying to do is generate an interrupt when the number is 250. I've thought about connecting ...