Update internal flash through UART

Started by Ivan Z. in comp.arch.embedded11 years ago 2 replies

Hi, I'm working with TMS470R1A384. And I'd like to have ability to update my Program through UART. In others words, I'd like to write...

Hi, I'm working with TMS470R1A384. And I'd like to have ability to update my Program through UART. In others words, I'd like to write FlashLoader. But I have no idea how to write my program for it. I configured *.xcl so as my Program was in Bank_1 and INTVEC too. and my FlashLoader - in Bank_0. But my Programs interrupts use addresses at the beginning anyway. How can I tell tms470 t...


Micro with 4-independent PWM channels

Started by Mike in comp.arch.embedded15 years ago 37 replies

I am looking for a PIC or Atmel Micro that has 4-independentl controlled PWM channels of about 10-bit resolution . The frequnenc can be the same...

I am looking for a PIC or Atmel Micro that has 4-independentl controlled PWM channels of about 10-bit resolution . The frequnenc can be the same but I need simultaneous 0-100% duty cycle control o each channel independently . The max PWM frequncy should be greate than 1KH Price Range $2.00-$6.00/usd. A few A/D channels, interrupts,C-Compile friendly. I have looked @ the PIC18F1220, however ,...


[cross-post] g21k and non-interruptible functions

Started by Alessandro Basili in comp.arch.embedded8 years ago 39 replies

Dear all, I have the need to define some functions as "non-interruptible" and I remember some #pragma at least for C51 which would do this. I...

Dear all, I have the need to define some functions as "non-interruptible" and I remember some #pragma at least for C51 which would do this. I looked for similar #pragmas for the g21k but apparently I haven't found any hint. Does anyone out there know how to reliably define a function as non-interruptible? I understand that I could disable all interrupts and enable them once the function...


PIC16F648A interrupts

Started by Robert Baer in comp.arch.embedded5 years ago 5 replies

I have a simple program that runs the (timer2) PWM reliably, scope measurements confirm timing of pulse width and the rate as well. I add...

I have a simple program that runs the (timer2) PWM reliably, scope measurements confirm timing of pulse width and the rate as well. I add a simple 256 location lookup table to change the PW on a cyclic basis. Still OK but not exactly verified with scope on a dynamic basis, tho verified that i get the proper PW at setting of CCPR1L. Now, here is when i get into trouble; addin...


help with interrupt catching in Xilinx EDK 9.2 and custom IP

Started by llombard in comp.arch.embedded12 years ago

Dear all, Here is my problem: I make a new microblaze project in EDK 9.2i and a new custom IP with 1 register and 2 interrupts. I leave the...

Dear all, Here is my problem: I make a new microblaze project in EDK 9.2i and a new custom IP with 1 register and 2 interrupts. I leave the default settings everywhere, I link the interrupt to the xps_intc_0 "Intr" port. I add: microblaze_enable_interrupts(); { XStatus status; print("\r\nRegistering TEST_INT_Intr_DefaultHandler() to xps_intc_0...\r\n"); status = XIntc_...


Question About Sequence Points and Interrupt/Thread Safety

Started by Jujitsu Lizard in comp.arch.embedded11 years ago 137 replies

I've included a function below and the generated STM8 assembly-language. As it ends up (based on the assembly-language), the function is...

I've included a function below and the generated STM8 assembly-language. As it ends up (based on the assembly-language), the function is interrupt safe as intended. My question is, let's assume I have this: DI(); if (x) x--; EI(); where DI and EI just expand to the compiler's asm( ) feature to insert the right machine instruction to disable and enable interrupts, ... Is th...


Performance Analysis Tool

Started by Peter Mueller in comp.arch.embedded16 years ago 3 replies

Hi all, I just finished an application for a msp430. Unfortunately I need 2 redesigns to finally reach the required performance. The RMA tools...

Hi all, I just finished an application for a msp430. Unfortunately I need 2 redesigns to finally reach the required performance. The RMA tools I know do not support things like "one task triggers the execution of another task" or "bursts of execution in a cyclic manner (e.g. serial interrupts). Does anyone knows a good tool to model a real time system to get performance figures early du...


How to read a 32-bits hw counter on 8-bits microcontroller

Started by pozzugno in comp.arch.embedded6 years ago 8 replies

In the thread above about RS485 driver enable, always originated by me, some new and interesting (for me) techniques has been descripted to use...

In the thread above about RS485 driver enable, always originated by me, some new and interesting (for me) techniques has been descripted to use a "wide" (32- or 64-bits) hardware up/down counter to read effectively without disabling interrupts, as I usually have done in the past. If the processor supports native hardware 32-bits counter, the problem doesn't exist: most probably it can b...


silrtos port on ARM

Started by Anonymous in comp.arch.embedded12 years ago 5 replies

I was looking for low footprint RTOS (with minimal capability of Message Q, semaphore, memory mgmt, few tasks & interrupts) and found silRTOS...

I was looking for low footprint RTOS (with minimal capability of Message Q, semaphore, memory mgmt, few tasks & interrupts) and found silRTOS fits for my budget size(


EP93xx FREE-RTOS and VIC interrupts

Started by tommessum in comp.arch.embedded10 years ago

Anybody know of a freeRTOS implementation for the Cirrus EP93xx chip? I am trying to keep the basic set of interrupt functions used in...

Anybody know of a freeRTOS implementation for the Cirrus EP93xx chip? I am trying to keep the basic set of interrupt functions used in the original ARM port used for other devices. This requires a direct vectored jump to a program memory location held in the VIC address register when an IRQ arives. In many ARMs this is simply done by including a "ldr pc,[PC,#-0xFF0]" in the IRQ entry of t...


Zilog whinge

Started by Paul Burke in comp.arch.embedded15 years ago 6 replies

I need a whinge. Bloody Zilog's so-called ez80 software has been running me ragged for over a week. The code executes perfectly on the...

I need a whinge. Bloody Zilog's so-called ez80 software has been running me ragged for over a week. The code executes perfectly on the development kit, crashes on the target. Running off with the fairies, Program counter pointing anywhere. MUST be a hardware fault. Spent ages writing evermore sophisticated tests to fault the RAM. No failures at all. OK, spurious interrupts- had every...


Motorola HC08 interrupts

Started by Aria in comp.arch.embedded15 years ago 9 replies

Hi, I'm very new to the motorolla chips (or programming MC for that matter). i am tryin to figure out how to write an interrupt...

Hi, I'm very new to the motorolla chips (or programming MC for that matter). i am tryin to figure out how to write an interrupt service routine for the Keyboard interrupt. > From a not so reliable sample code i have: interrupt 15 void KBI_ISR (void) { ...some code } is this right? if so, can i replace KBI_ISR with some other name? and if i want to write an interrupt for IRQ


Cheap debugging tools, software UART

Started by Jim Stewart in comp.arch.embedded9 years ago 11 replies

Watching all this discussion about debugging with an LED and such, I was wondering if anyone else writes software UARTS for debug info. I've...

Watching all this discussion about debugging with an LED and such, I was wondering if anyone else writes software UARTS for debug info. I've written a 9600 baud tx-only UART for AVR's in 35 assembly instructions. The data out can be inverted so that you can connect the tx I/O pin directly to your terminal without an inverter or driver. Timing is by software timing loops so interrupts...


what is "grouped"?what is "spread"?

Started by leilei in comp.arch.embedded11 years ago 1 reply

Hi, I am reading MPC8280 PowerQUICC=99 II Family Reference Manual. In section 4.3.1.1, it mentioned two words: grouped, spread. the sentence is...

Hi, I am reading MPC8280 PowerQUICC=99 II Family Reference Manual. In section 4.3.1.1, it mentioned two words: grouped, spread. the sentence is like this: The SIU interrupt configuration register (SICR), shown in Figure 4-10, defines the highest priority interrupt and whether interrupts are grouped or spread in the priority table, I have some trouble to understand this. what is grouped...


Timer (capture/compare) issue

Started by Joris Dobbelsteen in comp.arch.embedded16 years ago 1 reply

I'm looking for any good advice on working with the capture/compare unit of the eZ8. (eZ8 documentation references below) The goal is to...

I'm looking for any good advice on working with the capture/compare unit of the eZ8. (eZ8 documentation references below) The goal is to capture the time between two events (high signals). It must reliability capture these events continuesly with the highest possible precision. To complicate the matter, the times scale beyond the 16-bit counter. Multiple interrupts are generated and while...


Running PSIM (PowerPC simulator) under GDB

Started by David R Brooks in comp.arch.embedded16 years ago 3 replies

Sorry if this is a bit of a clueless newbie question, but here goes. Running under Cygwin, with GDB and the embedded PowerPC simulator, PSIM. I...

Sorry if this is a bit of a clueless newbie question, but here goes. Running under Cygwin, with GDB and the embedded PowerPC simulator, PSIM. I can load the code OK, but when I try to run it, I get Type 7 ("Program") exceptions. This occurs even if interrupts are disabled by setting MSR=0. As I understand, Exception 7 originates from certain floating-point problems, which should not apply i...


Evaluation of real time kernel performance

Started by brOS in comp.arch.embedded10 years ago

hi all, I'm wondering what are the main parameters when talking about kernel performance...and when I say kernel I mean basic stuff, like...

hi all, I'm wondering what are the main parameters when talking about kernel performance...and when I say kernel I mean basic stuff, like context switching, blocking time, time for finding task of the highest priority etc... I am familiar with following parameters: -interrupt latency(which is, as I understand, directly proportional to length of sections of code where interrupts are disabled...


Anyone with milage on the TMS470R1B1, and IAR IDE for same?

Started by Tim Wescott in comp.arch.embedded9 years ago 10 replies

Just starting to use the TMS470R1B1, which is a high-temp, high-rel processor with the ARM M3 core. At the customer's insistence I'm using...

Just starting to use the TMS470R1B1, which is a high-temp, high-rel processor with the ARM M3 core. At the customer's insistence I'm using the IAR IDE, and interrupts are all f***ed up. Even the IAR demos don't work, and the register definitions in the ever-so-easy-to-find files don't match the documentation or, apparently, reality. I'm trying to figure out how much of this is me, h...


Atmega168 and peripheral interrupts

Started by P.Marek in comp.arch.embedded14 years ago 2 replies

I have a problem with an atmega168. On my test board I have a jumper on PB1 and a LED on PD5, using internal 8MHz RC-clock. Given the...

I have a problem with an atmega168. On my test board I have a jumper on PB1 and a LED on PD5, using internal 8MHz RC-clock. Given the following program: #include #include #include INTERRUPT(SIG_PCINT0) { unsigned short i; char j; for(j=0; j


C 'desktop' programmer needs advice on how to code embedded C on a micro controller.

Started by Roger Walker in comp.arch.embedded13 years ago 40 replies

Hi Group, Intro I've been programming for a long time (to long to mention!), but 99% of my programming has been for 'desktop' PCs under DOS...

Hi Group, Intro I've been programming for a long time (to long to mention!), but 99% of my programming has been for 'desktop' PCs under DOS and UNIX using C. I've rarely had to worry about interrupts, watchdogs etc. Well now I have to! The target will be a Radio with an 8-bit NEC Micro controller (non-RTOS). My initial task is to Tx/Rx data over serial comms (again, I hope in C). The da...