Can anyone shed some light on this problem please? It's likely to be something simple that I've overlooked. I'm using MPLAB 7.5 running on XP...

Can anyone shed some light on this problem please? It's likely to be something simple that I've overlooked. I'm using MPLAB 7.5 running on XP SP2. It's simple assembly code that services INT0 on the falling edge of port RC0 and services INT1 on the falling edge of RC2. Everything works OK except that should RC2 become active while INT0 is being serviced, as soon as the INT0 ISR completes...

Hello all, This is an AVR specific problem. When I write a function for timer2 overflow as follows: // Timer 2 overflow interrupt service...

Hello all, This is an AVR specific problem. When I write a function for timer2 overflow as follows: // Timer 2 overflow interrupt service routine interrupt(SIG_OVERFLOW2)//SIG_INTERRUPT0)//SIG_OVERFLOW2) { // Place your code here PORTD ^= _BV(7); } and make with winavr, I get the following warnings: E:/AVR/WinAVR/testfiles/isr.c:6: warning: return type defaults to `int' E:/AVR/...

Hi friends, I am doing project on SILAB c8051F340 based processor, which includes USB communication and PCA for frequency generation. A global...

Hi friends, I am doing project on SILAB c8051F340 based processor, which includes USB communication and PCA for frequency generation. A global counter (unsigned long) is updated in PCA interrupt, read & updated in USB interrupt, and read only in Main loop. So what care should be taken to avoid conflict within these interrupts. Thanks in advance, kishore.

hi all, i have an interrupt-related problem on a self-designed pc104-board: i have several int-sources connected to a register and an...

hi all, i have an interrupt-related problem on a self-designed pc104-board: i have several int-sources connected to a register and an edge-detector. if an edge is detected an int is raised. the shared isr's then check the register to see if they need to service their device. the int is cleared by writing to the register. my problem: sometimes no more ints are generated. reloading a dr...

My microcontroller project has a small design mistake: I'm driving a small buzzer but I accidentally connected it to the wrong pin. It should...

My microcontroller project has a small design mistake: I'm driving a small buzzer but I accidentally connected it to the wrong pin. It should have been connected to the OC0 pin which allows me to simply set the Timer0 register and it will produce a PWM output with a certain frequency. Connecting the buzzer to the wrong pin forces me drive the buzzer 'manually.' So I'm planning to generate...

Hello, So, I am in the process of working on a new project where we will be using PCI Mezzanine Cards (think normal PCI cards from your PC,...

Hello, So, I am in the process of working on a new project where we will be using PCI Mezzanine Cards (think normal PCI cards from your PC, except in a smaller form factor) for a small, expandable, embedded system. This system will be running stand-alone (no CompactPCI or other backplane scheme). Just a Processor PMC card running the show, as well as a few add-on PMC cards on a stand-alone ...

Hi all , I am using AVR Studio + WinAVR to develop software for ATmega2560. Before the hardware arives I am trying to get used to the uC...

Hi all , I am using AVR Studio + WinAVR to develop software for ATmega2560. Before the hardware arives I am trying to get used to the uC by running software on the simulator that comes with AVR studio. I have all the 4 UARTS enabled and thier TX and RX interrupts enabled. When I some tests by a byte on all four UARTS the simulator execution only hits the ISRs for the first two UARTS and ...

Hi folks, My code is handling both timer0 interrupt and SPI interrupt. And I don't want to loose any of the SPI interrupts and hence thought...

Hi folks, My code is handling both timer0 interrupt and SPI interrupt. And I don't want to loose any of the SPI interrupts and hence thought of making the timer0 ISR to work in NOBLOCK mode. But when i use ISR(TIMER0_COMP_vect, ISR_NOBLOCK) { /* Code */ } the compiler gives an error: "macro "ISR" passed 2 arguments, but takes just 1" where it works fine for ISR(TIMER0_COMP_vec...

Hi All! I have a PIC16f877a. I want to work with the device mainly in sleep, wake on RB change, do some stuff (say led blink) and go back to...

Hi All! I have a PIC16f877a. I want to work with the device mainly in sleep, wake on RB change, do some stuff (say led blink) and go back to sleep. This code works fine if i put the blink code in the ISR. How do i use this code in the main program in C? I tried :- main() { // initialization of interrupts etc... s1 :asm("SLEEP"); asm("NOP"); RE0=0x1; delay(); a fn. for 1s delay ...

I am faced with necessity to do low level programming on ARM9 system. That is, set up all operating modes with associated stacks and banked...

I am faced with necessity to do low level programming on ARM9 system. That is, set up all operating modes with associated stacks and banked registers, interrupts, caches and MMU. Could you advise a resource or book about ARM instruction set, low level programming and examples of good practices. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com

Hi all, could help me to understand how to relocate interrupts on the pxa255 processors? The arm architecture has the interrupt vector at...

Hi all, could help me to understand how to relocate interrupts on the pxa255 processors? The arm architecture has the interrupt vector at 0x0 or 0xFFFF0000 address. How to place the interrupt vector in the SDRAM memory while this procesor has the SDRAM memory placed at 0xa0000000. I tryed to understand the uboot start code and other loaders but they have the interrupt vector placed at...

I have two interrupt sources. ( serial comms & a timer overflow). What I would like to do is have the timer interrupt set at a higher priority...

I have two interrupt sources. ( serial comms & a timer overflow). What I would like to do is have the timer interrupt set at a higher priority so that it can interrupt the serial interrupt ISR. I have set the ICR timer bit hi and the SYSCR INTM0 bit hi but the comms is still holding off the timer. I see a reference to I & UI bits. What are they? Does anyone know how to do this. TIA ...

I am using the M32C/83 and bit banging I2C out on port 9. Port 9 requires the data direction register to be unlocked via PRCR before writing to...

I am using the M32C/83 and bit banging I2C out on port 9. Port 9 requires the data direction register to be unlocked via PRCR before writing to PD9. Occasionally, PD9 isn't getting set and one of my I2C pins does not go low when it should. Bad things happen after that. The H/W manual states that no interrupts or DMA should occur between the unlocking of PD9 and the writing of PD9. I ...

I have measured the time it takes for the IAP to erase one 4kB sector and it was 400ms. The processor is being clocked with a 14.74MHz chrystal,...

I have measured the time it takes for the IAP to erase one 4kB sector and it was 400ms. The processor is being clocked with a 14.74MHz chrystal, 1x multiplier, no MAM. No interrupts whatsoever. Activating the PLL and MAM made no difference. I configured the CCLK to 4x and then the delay dropped to 100ms (note: the CCLK argument to IAP was changed accordingly). Then I changed the CCLK argum...

I'm trying to interface to a MAX11043 (4-channel synchronous ADC with SPI output). It has an end-of-conversion pin, which when active means that...

I'm trying to interface to a MAX11043 (4-channel synchronous ADC with SPI output). It has an end-of-conversion pin, which when active means that a bunch of data is available to read via SPI. Which is fine, except I want to run this baby at 200kHz (ish). Which means that using the EOC pin as an IRQ input is fairly nuts. (CPU is an AVR AT32UC3A.) The ADC data will be shipped out, raw, in ...

Hi everybody I have a strange problem with a cypress FX2. I want to work with timers and external events on INT0 and INT1 Pin. (I want to...

Hi everybody I have a strange problem with a cypress FX2. I want to work with timers and external events on INT0 and INT1 Pin. (I want to measure the time beween an event on INT0 and INT1). Everything works fine except I get the interrupts IE0, TF0, IE1 and TF1 alltogether on interrupt vector 0x1b (normally only TF1). If I use 'interrupt 3' everthing works fine. I can enable/disable ...

Hi All, I have developed one PCI driver, The Interrupts are working in 2.4 kernel (Redhat-9), and also it is working in RHEL-AS-4 (2.6 kernel),...

Hi All, I have developed one PCI driver, The Interrupts are working in 2.4 kernel (Redhat-9), and also it is working in RHEL-AS-4 (2.6 kernel), But It is not working in RHEl-5 using Interrupt mode. After Enabling the PCI Interrupt also, It should automatically enter into ISR, But it is not happening in RHEL-5 (2.6.18-53.el5)....what might be the problem. I have used request_irq(IRQLine...

Hello guys, Problem with the very basics. I am stuck with the external interrupt INT0 at RB0. Controller - PIC 18F47J53 MPLAB IDE, Microchip...

Hello guys, Problem with the very basics. I am stuck with the external interrupt INT0 at RB0. Controller - PIC 18F47J53 MPLAB IDE, Microchip C Compiler I could not figure out what is wrong with the following code. Kindly help me out to make this work!! #include #include #include #pragma config OSC = HS #pragma config WDTEN = OFF #pragma config

The bit in the MOR that controls the int pin for edge or edge & level sensitivity, does that apply only for interrupts, or also for BIH &...

The bit in the MOR that controls the int pin for edge or edge & level sensitivity, does that apply only for interrupts, or also for BIH & BIL instructions?

Hi, Microchip PIC 18f8722 USART2 Interrupt is not working - I have USART1 working fine with interrupts but cannot get interrupt on usart2 -...

Hi, Microchip PIC 18f8722 USART2 Interrupt is not working - I have USART1 working fine with interrupts but cannot get interrupt on usart2 - the RC2IF interrupt flag never gets set although data is coming into the rcreg2 register and i can read from it. Is there any special considerations I need to take into account? Global INT flag is enabled as well as all INTs on High priority. Code ...