Writing memory with GDB.

Started by Joseph Casey in comp.arch.embedded15 years ago 1 reply

Greetings. Can I write memory locations with GDB? I have been looking through Debugging With GDB and a few tutorials but can't find anything -...

Greetings. Can I write memory locations with GDB? I have been looking through Debugging With GDB and a few tutorials but can't find anything - only how to read memory and write to variables. I am using GDB 5.1.1 for TI MSP430 in text mode but I expect the commands would be the same as for native debugging. Help appreciated. Joseph Casey.


WTB 2MB SRAM Linear memory pcmcia card (or trade)

Started by Anonymous in comp.arch.embedded14 years ago 2 replies

I am looking for a 3.3 volt, 2 meg SRAM memory card. I have a 2MB Smart Technologies Flash card but I think it behaves like a HDD and I just...

I am looking for a 3.3 volt, 2 meg SRAM memory card. I have a 2MB Smart Technologies Flash card but I think it behaves like a HDD and I just need a card that can be accessed as plain-ole-memory. Thanks heirbrande at the yahoo at the dot at the com


memory menagement routines

Started by Mastupristi in comp.arch.embedded16 years ago 12 replies

where can I find some memory menagement routines like melloc()/free() for very limited memory embedded system? thanks --...

where can I find some memory menagement routines like melloc()/free() for very limited memory embedded system? thanks -- Mastupristi? Posted from X-Privat Free NNTP server - www.x-privat.org


Little Endian: What would be the no stroed at memory location 0x0001

Started by 2005 in comp.arch.embedded13 years ago 5 replies

Hi It is given that the number 0x0abc1234 is stored in a four-byte integer, starting a location memory 0x0000. What would be the no stroed...

Hi It is given that the number 0x0abc1234 is stored in a four-byte integer, starting a location memory 0x0000. What would be the no stroed at memory location 0x0001? Thanks


Recommendation on USB hub IC for USB memory stick

Started by Ron in comp.arch.embedded15 years ago 3 replies

Hi guys, I'm looking at ways to update our companies firmware out in the field (it will mostly be fpga code in .bit format). A USB memory...

Hi guys, I'm looking at ways to update our companies firmware out in the field (it will mostly be fpga code in .bit format). A USB memory stick would work nicely for this. Do any of you have any recommendations on a microcontroller that has a USB host core? Or what about USB-OTG? The port would only use a memory stick, no HID devices, etc. Thanks Ron


Memory Mapped I/O Physical Implementation

Started by joshc in comp.arch.embedded15 years ago 7 replies

Hi, I have used memory mapped I/O and understand it from a programmer's perspective, but I am curious as to how it gets implemented...

Hi, I have used memory mapped I/O and understand it from a programmer's perspective, but I am curious as to how it gets implemented in hardware. I basically want to know how physically(in hardware) this memory mapping takes place. For example, when the processor sends out 0xf000 on the address lines(bus) as part of a read request, how does the correct peripheral know that a read request...


Banked memory quesion (Z80 using IAR)

Started by wh_hsn in comp.arch.embedded12 years ago

Hi All, I've just inherited a project that was written for a Z80 platform using IAR 2.01G compiler. It?s using banked memory to cross the...

Hi All, I've just inherited a project that was written for a Z80 platform using IAR 2.01G compiler. It?s using banked memory to cross the 64k boundary. I've a problem addressing variables across pages. Consider the following example: ///////////// file: moduleA.c //////////////////////////////// //Module A: #pragma memory=dataseg(MOD_A_DATA) MOD_A_STRUC mod_a_struc; #p


Probing Memory to find size

Started by Anonymous in comp.arch.embedded14 years ago 3 replies

I am trying to write so code to find the amount of memory available in a device. It can either have 2,4,8, or 16 meg's. The memory starts...

I am trying to write so code to find the amount of memory available in a device. It can either have 2,4,8, or 16 meg's. The memory starts at 0x00000000. What is the best way to find how much is their. Here is what I am trying now but is their a better (prettier) way. #define DRAM_BASE 0x00000000 #define DRAM_END_2MB 0x001FFFFF #define DRAM_END_4MB 0x003FFFFF #define DRAM_END_8MB 0x...


Powerpc I/O memory, linux, mmap and eieio

Started by Mich Rundson in comp.arch.embedded11 years ago

Hi all, This week I inherited a buggy linux 2.4 device driver which controls a device through I/O memory. Most of the known bugs were caused...

Hi all, This week I inherited a buggy linux 2.4 device driver which controls a device through I/O memory. Most of the known bugs were caused by direct pointer dereferencing to the I/O memory space, without proper use of readb()/writeb() and friends, so those were easy to fix. The next step would be to move a big part of the code to userspace, because a lot of the driver consists of 3d pa...


USB Questions

Started by Anonymous in comp.arch.embedded16 years ago 3 replies

I 'm wanting to develop an application that will read these USB memory sticks into an embedded controller. I'm assuming that the "memory sticks"...

I 'm wanting to develop an application that will read these USB memory sticks into an embedded controller. I'm assuming that the "memory sticks" are formatted in FAT16 or FAT 32. What would be a good host controller to interface with say PIC microcontroller? I want to read/write text files to the memory stick. Thanks in advance. ????? -----= Posted via Newsfeeds.Com, Uncensored ...


Need help with flash memory control.

Started by GerberMultit00l in comp.arch.embedded14 years ago 10 replies

I am a hardware engineer designing an embedded application. I want to add up to 1GByte of non-volatile memory. The first product offering will...

I am a hardware engineer designing an embedded application. I want to add up to 1GByte of non-volatile memory. The first product offering will require 256MByte but I need room to expand. The whole assembly must be extremely small in size. It appears my only option for a large non-volatile memory space in this embedded application is NAND flash. However, the micro I must use does not ha...


Memory fragmentations-any solution?

Started by ssubbarayan in comp.arch.embedded12 years ago 5 replies

Dear all, For one of our module in a A/V based consumer product,we encounter memory fragmentation problem in the following manner: We have...

Dear all, For one of our module in a A/V based consumer product,we encounter memory fragmentation problem in the following manner: We have static buffer of 405KB.With in this 405KB,we need to allocate memory dynamically depending on the requirement.The situation under which fragmentation happens is: First module gets 44KB Second Module needs 512Bytes Third one needs 44KB Fourth one needs...


memory remap

Started by Tutu in comp.arch.embedded13 years ago 3 replies

What is meant by remapping of memory. I occasionaly read this term during the initialisation sequence of any microcontroller, but...

What is meant by remapping of memory. I occasionaly read this term during the initialisation sequence of any microcontroller, but never understood. Can someone throw some light ?


linker script headers

Started by Tom in comp.arch.embedded15 years ago 7 replies

Hi, Can anyone explain me the following statement: If a memory that contains loadable section followed by uninitialized section followed by...

Hi, Can anyone explain me the following statement: If a memory that contains loadable section followed by uninitialized section followed by another loadable section then in this case the memory region needs 2 headers (one for each of the loadable memory chunk). Why is this ? Tom


Video Controller :: Best Practices

Started by Vladimir Vassilevsky in comp.arch.embedded7 years ago 5 replies

I have to design a video subsystem for instrument. Nothing really fancy; just color TFT with menu interface, fonts, bitmaps, graphic primitives,...

I have to design a video subsystem for instrument. Nothing really fancy; just color TFT with menu interface, fonts, bitmaps, graphic primitives, plots and such. The graphics would be entirely CPU based; video memory is part of main memory. The frame buffer is DMAed to LCD directly; so the DMA continuously runs through memory. Video is not main occupation of the system; perhaps it would t...


Rebooting

Started by karthikbg in comp.arch.embedded13 years ago 4 replies

Hi, I am running an application in RAM . This application un-tar's a 'files.tar' file and puts the un-tarred files in the FLASH memory of...

Hi, I am running an application in RAM . This application un-tar's a 'files.tar' file and puts the un-tarred files in the FLASH memory of my board. After this, my application clears the flash memory in 2 minutes and makes the FLASH Memory empty . Now, the application onceagain un-tars the 'files.tar' file . The files are placed in the FLASH Memory by the application and the whole of the...


newbie Q, multiprocessor interconnect with bus

Started by Elinore in comp.arch.embedded14 years ago 1 reply

hi Each processing node has its local memory and global memory to share. Each processor and its local memory are connected with local bus....

hi Each processing node has its local memory and global memory to share. Each processor and its local memory are connected with local bus. There are also 'routing' issue and 'arbitration' issue. then 'Is it possible to make MESH-interconnected on-chip 4 processors using BUS ? ' It implicitly mean the interconnection between switches can be a 'bus'.....Maybe my knowledge is short to...


shared memory with threadx

Started by mungam in comp.arch.embedded13 years ago 5 replies

hello, Im working on threadx rtos (actually with NET+OS 6.3 from Netsilicon), I have already the source code of my project but I need to port...

hello, Im working on threadx rtos (actually with NET+OS 6.3 from Netsilicon), I have already the source code of my project but I need to port it to threadx. This code uses shared memory with such libraries and functions as shm.h or shm_open() which are not provided by threadx. How can I do the same thing? Everything would be ok if it wouldn't miss memory.h and sys/shm.h.... :( help......


Embedded Linux PCI memory map

Started by Anonymous in comp.arch.embedded14 years ago 1 reply

Hi, I have a question about PCI memory map. We use a processor that can only access 128M of PCI memory. So lets say it has assigned the PCI...

Hi, I have a question about PCI memory map. We use a processor that can only access 128M of PCI memory. So lets say it has assigned the PCI memory address from 0xd0000000 - 0xd7ffffff .. Now I have PCI device which has 4 base address. Base Adress 0 - 64M Base Address 1 -4 M Base Address 2 - 4 M Base Adress 3 - 4 M Now what I see when Linux Boots up. It sets th...


malloc in embedded systems

Started by phileo in comp.arch.embedded16 years ago 10 replies

I have an embedded system using an RTOS. The one weakness of this RTOS is that it has a weak memory manager. You can pre-define the block size...

I have an embedded system using an RTOS. The one weakness of this RTOS is that it has a weak memory manager. You can pre-define the block size that will be created in the memory pool, but this block size is always fixed. That means that it won't be able to allocate the exact amount of memory that you need - it will turn out to always be too much. The only exception to this is if I pre-def...