Hi Can anyone tell me how to get hold of the details of the JTAG COP (BDM interface for Freescale PowerPC CPUs (especially MPC824x series)? I...

Hi Can anyone tell me how to get hold of the details of the JTAG COP (BDM interface for Freescale PowerPC CPUs (especially MPC824x series)? I hav the pinouts and IEEE1149.1 compliant stuff but I want to find out how t use the software debug functions. Same question for the IBM PowerPC range too ..... thx og -> This message was sent using the web interface o www.EmbeddedRelate

Hello recently I purchased linksys NSLU2 and found that buying some NAS (o consumer device) seems to be the perfect way how to get...

Hello recently I purchased linksys NSLU2 and found that buying some NAS (o consumer device) seems to be the perfect way how to get evaluttio board quite cheaply -- I'm software engineer, so I don't need all th GPIO's contacts on board available, mostly I'm just interesting i ethernet, serial for console and PowerPC processor (plus flash an RAM). Anything available? So far I've found just ...

Hello Community, I am new to PowerPC and I have the Freescale MPC5566EVB with me for experimenting with MPC5566. I am using CodeWarrior with...

Hello Community, I am new to PowerPC and I have the Freescale MPC5566EVB with me for experimenting with MPC5566. I am using CodeWarrior with PENexus Micro debugger. My aim is to develop a code for FMPLL and store it in MPC internal SRAM. Then I want to boot the device from the internal SRAM. I have two questions regarding this. 1. What is the configuration of BOOTCFG for booting from 'interna...

Sorry if this is a bit of a clueless newbie question, but here goes. Running under Cygwin, with GDB and the embedded PowerPC simulator, PSIM. I...

Sorry if this is a bit of a clueless newbie question, but here goes. Running under Cygwin, with GDB and the embedded PowerPC simulator, PSIM. I can load the code OK, but when I try to run it, I get Type 7 ("Program") exceptions. This occurs even if interrupts are disabled by setting MSR=0. As I understand, Exception 7 originates from certain floating-point problems, which should not apply i...

Just getting started on a new project consisting of a PowerPC 405 processor on a custom board (i.e. no BSP available, we'll have to build...

Just getting started on a new project consisting of a PowerPC 405 processor on a custom board (i.e. no BSP available, we'll have to build one). Operating system is Micrium MicroC/OS-II; development environment is Eclipse on Windows XP; language is C. Eclipse on Windows seems most happy with MinGW as a compatibility layer with GCC; it seems less happy with Cygwin although I would imagi...

Hello, am New to PCB board design cycle. Working on circuit having powerPC interfaced with nand flash,FPGA,DDR and ethernet ASIC. I have to do...

Hello, am New to PCB board design cycle. Working on circuit having powerPC interfaced with nand flash,FPGA,DDR and ethernet ASIC. I have to do the cycle accurate Functional simulation of the above circuit. How should i go for it? Queries: 1. Which tool i should use. 2. Do i need to convert schematics into verilog? 3. Do i need Models for all the components in the circuit. What is the p...

hi when i work with xilinx edk (ver 8.1),after downloading my code to the V2Pro,the info below appears.but at first it is ok,and after some...

hi when i work with xilinx edk (ver 8.1),after downloading my code to the V2Pro,the info below appears.but at first it is ok,and after some times,it appears. what what should i do to solve the prolbem? "unable to connect to PowerPc target, Invalid Processor Version No 0x00000000".

I was wondering if anyone had experience with the powerpc 8272 involving the use of the SPI port. I was reading in the manual and I quote...

I was wondering if anyone had experience with the powerpc 8272 involving the use of the SPI port. I was reading in the manual and I quote the following in chapter 35 on the SPI hardware: "The maximum sustained data rate that the SPI supports is SYSTEMCLK/50. However, the SPI can transfer a single character at much higher rates?SYSTEMCLK/4 in master mode and SYSTEMCLK/2 in slave mode. Gap

Hello all, I have to program the internal flash (it is called UC3F) of an MPC563 PowerPC. After having read the Reference Manual's chapter...

Hello all, I have to program the internal flash (it is called UC3F) of an MPC563 PowerPC. After having read the Reference Manual's chapter three times, I still don't understand fully how to write a sequence of bytes to the flash. I am sure that it is not that difficult, but it's the first time I have this kind of task. From what I understand: In order to rewrite the flash, you must fi...

Hi, I'am working with a MPC855T PowerPC microprocessor and i try to debug my soft using ICE/BDM. My application raises a "Software Emulation"...

Hi, I'am working with a MPC855T PowerPC microprocessor and i try to debug my soft using ICE/BDM. My application raises a "Software Emulation" exception that is catched by emulator and i would like to know which software instruction raised this exception but SRR0 register is 0 (zero). This register should contain the last instruction before exception ? should it not ? Is it possible to ...

Any can help me to find the boot sequence of powerPC 83xx of linux kernel after the bootloader transfer control to kernel.. Please please help...

Any can help me to find the boot sequence of powerPC 83xx of linux kernel after the bootloader transfer control to kernel.. Please please help me.... thanks, Nabendu

I'm getting to work on a PowerPC-based NAS appliance, based around an MPC8241 micro. There appears to be a standard 16-pin COP port on...

I'm getting to work on a PowerPC-based NAS appliance, based around an MPC8241 micro. There appears to be a standard 16-pin COP port on the board. Apparently nobody else in the entire universe has ever used this port, though. I have a (genuine Macraigor! Accept no substitutes!) JTAG wiggler that was originally bought for ARM development, and has the standard 20-pin ARM header. However, the ...

Consider the following (compiler=GCC3.4.3, host=I686, target=powerpc-eabi): typedef void(*pVoid)(void); static inline bool1...

Consider the following (compiler=GCC3.4.3, host=I686, target=powerpc-eabi): typedef void(*pVoid)(void); static inline bool1 kSetVector(uint1 level, pVoid func, int type) { int r; const int code = 0; __asm__ __volatile__ ( " li 0, %1 \n" /* code */ " mr 3, %2 \n" /* level */ " mr 4, %3 \n" ...

Hi, Is there anyone who knows where can I buy XIlinx PowerPC & MicroBlaze Development Kit in european union ??...

Hi, Is there anyone who knows where can I buy XIlinx PowerPC & MicroBlaze Development Kit in european union ?? (DO-ML403-EDK-ISE, http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?sGlobalNavPick=PRODUCTS& sSecondaryNavPick=Intellectual+Property&category=&iLanguageID=1&key=DO-ML403-EDK-ISE ) I tried via XIlinx on-line store but since their products are not RoHS compliant

Hi all. I have some problems with PowerPC syncronization instructions. In particular I would know when sync and eieio instructions must be...

Hi all. I have some problems with PowerPC syncronization instructions. In particular I would know when sync and eieio instructions must be used. I have the source code of a real time operating system for a single processor board (MVME6100 with MPC7457) and I have notice the use of sync, isync and eieio instructions. The question is: the syncronization instruction should be used only in a mul...

[Test] I am trying to use a real news server rather than posting from google.groups. Sorry for repeat posts if you did not filter it before. I...

[Test] I am trying to use a real news server rather than posting from google.groups. Sorry for repeat posts if you did not filter it before. I wonder in order to avoid treating as SPAM, should I assign email address other than my gmail account? ^_^ Or will my post be still SPAM-like even if I send articles through real news server? Howdy, I have a PowerPC 405GP Walnut eval board. Re...

Howdy, I have a PowerPC 405GP Walnut eval board. Recently, by accident, the flash which stores U-Boot is corrupted. Therefore the board...

Howdy, I have a PowerPC 405GP Walnut eval board. Recently, by accident, the flash which stores U-Boot is corrupted. Therefore the board cannot boot now. I want to use the JTAG port on the board to rewrite the flash with new U-Boot. I found many products for this propers, but they are too expensive for me. It costs $1000-$3000... > _ < Eg: BDI2000, Silicon Probe... What I really want is

Hi, We have been using PowerPC eieio(Enforce-In-Order Execution of I/O) assembly language instruction on Freescale MPC500...

Hi, We have been using PowerPC eieio(Enforce-In-Order Execution of I/O) assembly language instruction on Freescale MPC500 Family Microcontrollers. Can we use this instruction on Freescale MPC5500 Family Microcontrollers, for example MPC5566? If yes, do we need to modify any registers to make this instruction work? thanks.

Suppose that the following three events nominally occur in the given order: 1) Store to memory location A 2) Store to memory location B 3)...

Suppose that the following three events nominally occur in the given order: 1) Store to memory location A 2) Store to memory location B 3) Soft reset Is it possible for the soft reset to cause the store to A to not occur but the store to B to occur? Does it matter if the soft reset is internally or externally generated? Are the answers to these questions dependent on the PowerPC i...

I'm wondering about the assembly generated by my compiler for a 32-bit PowerPC processor. I have some code(in C) that deals with 16 bit unsigned...

I'm wondering about the assembly generated by my compiler for a 32-bit PowerPC processor. I have some code(in C) that deals with 16 bit unsigned integer types(unsigned short int on my compiler) and I have some questions about the assembly that is generated for some of the code. If I have a function such as the following: unsigned short int foo(unsigned short int x, unsigned short int y) ...