SDRAM problem on PPC405EP

Started by Rivor in comp.arch.embedded15 years ago 1 reply

I have a design on PPC405EP processor. In my design, a 2M * 32 bit SDRAM is used. But in practice, Only One typ of SDRAM chip is supported,...

I have a design on PPC405EP processor. In my design, a 2M * 32 bit SDRAM is used. But in practice, Only One typ of SDRAM chip is supported, other Chip can not work in same configure. I set the SDRAM config register as the following: #define SDRAM_CFG 0x80800000 #define SDRAM_RTR 0x08200000 /* Define 133M refreshing rate. 133MHz #define SDRAM_B0CR 0x00828001 /* 8M, Base=0x800000(8MB) */...


why not access much than 8K of the sdram?

Started by xtmtd in comp.arch.embedded14 years ago

working with xilinx edk. I have a sdram of 32M, when I tried to copy data from flash to sdram, it works well only when the accouts is less...

working with xilinx edk. I have a sdram of 32M, when I tried to copy data from flash to sdram, it works well only when the accouts is less than 8K, when i copy data, which is more than 8K,it is wrong. it just repeatly copy a little data to sdram,what is the problem should be? I am sure my flash works well.


why not can it access more than 8K of the sdram?

Started by xtmtd in comp.arch.embedded14 years ago 2 replies

working with xilinx edk. I have a sdram of 32M, when I tried to copy data from flash to sdram, it works well only when the accouts is less...

working with xilinx edk. I have a sdram of 32M, when I tried to copy data from flash to sdram, it works well only when the accouts is less than 8K, when i copy data, which is more than 8K,it is wrong. it just repeatly copy a little data to sdram,what is the problem should be? I am sure my flash works well.


Segger file system and SDRAM

Started by bikerdan in comp.arch.embedded9 years ago 3 replies

I am working with an LPC2478 and the Segger file system and an IAR IDE. I am having trouble getting the file system to work out of SDRAM. It...

I am working with an LPC2478 and the Segger file system and an IAR IDE. I am having trouble getting the file system to work out of SDRAM. It works fine from on chip RAM. The SDRAM even passes a memory check. But when I try to open a file with the Segger file system using SDRAM, at one point in the execution a function that is accessed by pointer goes bad. Any thoughts greatly appreciated. ...


problem while executing program from external SDRAM

Started by aditya in comp.arch.embedded15 years ago 9 replies

Hi all, I made a board using sharp LH79520 and micron sdram 8MB and flash memory. I made a boot loader (running from the flash) which is...

Hi all, I made a board using sharp LH79520 and micron sdram 8MB and flash memory. I made a boot loader (running from the flash) which is just putting the binary image (made by the crossworks IDE) into the SDRAM. Now the problem is that program code is written and verified properly in the SDRAM but while execution the program hangs abruptly at random execution points, and the values of...


armlinux oops once access more than 32Mega SDRAM

Started by lbczjyx in comp.arch.embedded14 years ago

I use U-boot-1.1.1, and ARM-linux-2.4.27, at91rm9200DK, 2 chip SDRAM 16-bit width. In uboot context, I can access all the 64Mega of SDRAM...

I use U-boot-1.1.1, and ARM-linux-2.4.27, at91rm9200DK, 2 chip SDRAM 16-bit width. In uboot context, I can access all the 64Mega of SDRAM well. In linux context, I can see 64Mega SDRAM by "free", and 46Mega available. I test memory, if the used memory bytes increase to 32Mega, the kernel oops. Can anybody help me? Any advice would be appreciated!


Question about memory mapping in ARM processor based SoC

Started by Bhavik in comp.arch.embedded13 years ago 8 replies

Hello, I am working on embedded application development for ARM926EJ processor based SoC. As per my product specification, there are 2 SDRAM...

Hello, I am working on embedded application development for ARM926EJ processor based SoC. As per my product specification, there are 2 SDRAM memory banks which can address 128 MB SDRAM each. So the there could be overall 256MB SDRAM in the system. The board that I have has 128 MB of SDRAM as per the specification. So I suppose there is only one memory bank used with 128 MB memory. I ...


how to initialize the sdram refresh control register?

Started by Lucky443 in comp.arch.embedded11 years ago

Hi all, I have a target board with vr4131 processor and K4S561632C-75c samsung sdram, vr4131 has inbuilt sdram controller. Now i have to set...

Hi all, I have a target board with vr4131 processor and K4S561632C-75c samsung sdram, vr4131 has inbuilt sdram controller. Now i have to set the sdram control unit's refresh control register. for that formula what they have given in the vr4131 user manual is Refresh interval = BRF(13:0) × VTClock Calculate the setting value based on the DRAM refresh cycle count and bus access cycle (e...


Help with simplified SDRAM access

Started by yo in comp.arch.embedded16 years ago 7 replies

Hi, I'm building a very low cost PC Oscilloscope. I have lots of spare PC-100 SDRAM chips and would like to use them instead of buying FIFO....

Hi, I'm building a very low cost PC Oscilloscope. I have lots of spare PC-100 SDRAM chips and would like to use them instead of buying FIFO. I cannot use the computers memory via PCI because the PCI card cannot guarantee memory access all the time. Therefore I would like to use SDRAM in my circuit board. I understand it's complex to use SDRAMS. I have an idea that could simplify the...


Atmel ARM AT91RM9200 SDRAM Issue

Started by Jack Klein in comp.arch.embedded16 years ago 3 replies

It appears that the SDRAM controller built into Atmel's AT91RM9200 ARM 9 chip only supports a burst length of 1. Exactly what use is an SDRAM...

It appears that the SDRAM controller built into Atmel's AT91RM9200 ARM 9 chip only supports a burst length of 1. Exactly what use is an SDRAM burst with a length of 1? What advantage does it have over an ordinary (non-burst) SDRAM access? Ulf, are you there? -- Jack Klein Home: http://JK-Technology.Com FAQs for comp.lang.c http://www.eskimo.com/~scs/C-faq/top.html comp.lang.c++ h...


trouble interfacing 16MB SDRAM to AT91RM9200 :-(

Started by Mayank Kaushik in comp.arch.embedded15 years ago 5 replies

Hi everyone, ive been trying to interface a 16MB SDRAM (MT84LC8M16A2, 128Mbit, 2x16x4)with an AT91RM9200 con my custom board. As u might have...

Hi everyone, ive been trying to interface a 16MB SDRAM (MT84LC8M16A2, 128Mbit, 2x16x4)with an AT91RM9200 con my custom board. As u might have guessed, its not working. Ive checked and rechecked the continuity of all connections, they seem to be okay. The SDRAM and the uC are placed close to each other on the PCB (which me and my friend designed). The following is the list of connections, p...


SDRAM data garbled due to seperate PCB for SDRAM ???

Started by Mayank Kaushik in comp.arch.embedded15 years ago 19 replies

Hi, Im trying to interface two 128Mbit SDRAMs (MT48LC8M16A2) to the AT91RM9200, but it doesnt seem to be going right. I have a custom...

Hi, Im trying to interface two 128Mbit SDRAMs (MT48LC8M16A2) to the AT91RM9200, but it doesnt seem to be going right. I have a custom board for the AT91, and a seperate board for the SDRAM, the two are connected through an ordinary ribbon cable. The master clock of the uC is running at 60Mhz. To test the integrity of the RAM, im writing data to a series of locations, say from 0x2000_000...


Program in external SDRAM and caching

Started by odi in comp.arch.embedded11 years ago 8 replies

hi, I have a simple program for my AT91RM9200 to turn led on and off. When I run it from internal SRAM it works ok, but when I copy it into...

hi, I have a simple program for my AT91RM9200 to turn led on and off. When I run it from internal SRAM it works ok, but when I copy it into external SDRAM and execute from there it jumps to address 0x2000001c (FIQ vector or is it just a coincidence?) instead of 0x2000003c (start code is there). 64MB of SDRAM was tested and looks ok. However when I disable instruction cache, this program works ok ...


Coldfire and SDRAM

Started by KBG in comp.arch.embedded14 years ago 1 reply

Hi, According to the MCF5272 datasheet, and the schematic, the address line A22 and A23 of ColdFire are to be treated as SDBA0 and SDBA1...

Hi, According to the MCF5272 datasheet, and the schematic, the address line A22 and A23 of ColdFire are to be treated as SDBA0 and SDBA1 and connected to BA0 and BA1 of the SDRAM respectively. But when the register value is set according to the above, the SDRAM initialisation faces problem. But when i set a value in such a way that the address lines A23 and A24 of ColdFire are connecte...


pin swap in SDRAM

Started by tullio.grassi in comp.arch.embedded13 years ago 7 replies

Hi, to ease the routing of my PCB, I'd like to swap some data lines on a SDRAM. I'd like to be 100% sure that the swapping will not create...

Hi, to ease the routing of my PCB, I'd like to swap some data lines on a SDRAM. I'd like to be 100% sure that the swapping will not create problems once the PCB is built. I use a SDRAM MT48LC8M16A2 from Micron. The only documentation that I found is: http://www.freescale.com/files/32bit/doc/app_note/AN2582.pdf about DDR, and they say "Pin-swap within a given byte lane to optimize the...


word and long access of SDRAM

Started by JY Kim in comp.arch.embedded13 years ago

I am working with samsung 2410 and k4S561632A 256M SDRAM we are using SDRAM only as 128M With trace32 we have confirmed word access of SDRAM...

I am working with samsung 2410 and k4S561632A 256M SDRAM we are using SDRAM only as 128M With trace32 we have confirmed word access of SDRAM works right. Setting display format as 16 bit and writing word at trace32 termial works right. But when we set display type long, and writing 32 bit data, it fails. Lower word is repeated in upper word. but we have anyway succeeded in word access, we ...


Sharp LH79520 and 32 bit SDRAM

Started by db in comp.arch.embedded16 years ago 1 reply

I am working on a microcontroller design using the LH79520. I would like to use the Micron MT48LC4M32B2 SDRAM which is 128Mb with a 32bit data...

I am working on a microcontroller design using the LH79520. I would like to use the Micron MT48LC4M32B2 SDRAM which is 128Mb with a 32bit data path. However in looking at the Sharp user manual, the sdram controller does not have a configuration listed for a 4Mx32 memory. The closest is 2Mx32. It looks like the 2Mx32 configuration should work for a 4Mx32, but I can not be certain. I...


Replacing LPC2478 with LPC1788

Started by Jens Gydesen in comp.arch.embedded5 years ago 11 replies

Hi, I have a lpc2478 PCB, with 16M SDRAM, 1/4 VGA LCD i. a. This board has run perfect for years. The SDRAM is 2x Micron...

Hi, I have a lpc2478 PCB, with 16M SDRAM, 1/4 VGA LCD i. a. This board has run perfect for years. The SDRAM is 2x Micron MT48LC16M4A2. In order to modernize this PCB, the cpu is replaced with the compatible LPC1788. I have problems with the SDRAM, it fails. The program crashes due to read/write errors and the LCD shows distorted displays. Does anyone here have expirencies with ...


Why Two SDRAM in AT91RM9200dk used

Started by pratikmittal4u in comp.arch.embedded14 years ago 1 reply

Hi All, I am working on a prototype board based on at91rm9200dk.now i have placed only one SDRAM (16 MB)on my board.I am able to access the...

Hi All, I am working on a prototype board based on at91rm9200dk.now i have placed only one SDRAM (16 MB)on my board.I am able to access the sdram and flash successfully but now after storing the gzip image u-boot.gz in flash when the board get reboot from external flash, it got hanged at Uncompressing Image... I thing it is trying to uncompress the image at the location above 16MB. ...


Readback verify error with SDRAM

Started by pkul7de in comp.arch.embedded12 years ago

Hi all, I am working on an ARM board setup containing an ARM IM-LT3, IT1 and four logic tiles, all used to emulate an ARM1176 based system. There...

Hi all, I am working on an ARM board setup containing an ARM IM-LT3, IT1 and four logic tiles, all used to emulate an ARM1176 based system. There is an external 128MB SDRAM connected to IM-LT3 board. All FPGAs are well configured. After connecting to the setup through RealView ICE, when I try to load any image at any SDRAM location (thru RVDebug), it gives following error. ----------- > loa