Lowest power 32-bit MCU with PCI, SDRAM?

Started by Ghazan Haider in comp.arch.embedded15 years ago 15 replies

I have seen plenty of ARM MCUs out there with impressive power consumption, but a very few offer SDRAM, and only one has PCI interface. The...

I have seen plenty of ARM MCUs out there with impressive power consumption, but a very few offer SDRAM, and only one has PCI interface. The motorola types, Dragonball and coldfire have these features, but are an order of magnitude more expensive on power. What is the least power consuming 32-bit MCU with glueless SDRAM and PCI interfaces? I'd prefer architectures that can use the PalmOS 4....


Question about SDRAM

Started by Anonymous in comp.arch.embedded11 years ago

i don't understand some definitions about SDRAM: 1)COLUMN: smallest unit data....if SDRAM is 4Mx16(=1megx16x4banks), is 16 colum's number of...

i don't understand some definitions about SDRAM: 1)COLUMN: smallest unit data....if SDRAM is 4Mx16(=1megx16x4banks), is 16 colum's number of bits or data out bits?Column's number of bits and data out pins are always the same or can differ each other? 2)BANK: in datasheet i found 1,2,4,etc...are these bytes or cells? For example, if bank=2, i obtain 2*16=32bit or 2*8=16bit? Thanks


Source for SDRAM chips

Started by Alex Parkinson in comp.arch.embedded15 years ago 30 replies

Does anyone know where small quantities of SDRAM chips (not modules) could be purchased? Thanks, Alex Parkinson

Does anyone know where small quantities of SDRAM chips (not modules) could be purchased? Thanks, Alex Parkinson


sram vs sdram

Started by Anonymous in comp.arch.embedded13 years ago 8 replies

seems a lot of applications use sdram rather then sram. What are the pros and cons of each? The only siginifacnt difference I see is density.

seems a lot of applications use sdram rather then sram. What are the pros and cons of each? The only siginifacnt difference I see is density.


why:memory read/write fine, but debugger halts

Started by John Black in comp.arch.embedded16 years ago 1 reply

Hi, I have a powerpc embedded system, in it there is a sdram chip on the bus, if I run memory test on the sdram and the test program is...

Hi, I have a powerpc embedded system, in it there is a sdram chip on the bus, if I run memory test on the sdram and the test program is loaded from powerpc cache, the test passes. But if I use the debugger through JTAG for powerpc to load the program into sdram, the debugger just halts there. Without going into the details, could you think of any reason for this? I am sure the debugg...


ARM7 + SDRAM

Started by Karl Katt in comp.arch.embedded15 years ago 1 reply

Hello! I just wanted to know if it is possible to access e.g. 16Mbyte SDRAM with an LPC2214 with an ARM7TDMI core? I think the necessary pins...

Hello! I just wanted to know if it is possible to access e.g. 16Mbyte SDRAM with an LPC2214 with an ARM7TDMI core? I think the necessary pins are all lined out. How to connect the RAM chip to the controller? I need this RAM for running ucLinux on it. Thanks a lot for the answers, Karl


SDRAM with YFBGA

Started by phateshawn in comp.arch.embedded13 years ago 2 replies

Hi all, I would like to solder a mobile SDRAM with YFBGA package to a PCB. I don't have a heating oven to solder it in a conventional way. Can...

Hi all, I would like to solder a mobile SDRAM with YFBGA package to a PCB. I don't have a heating oven to solder it in a conventional way. Can anybody suggest me an inexpensive way to achieve this? Thanks, -Phate


coldfire 5235 and SDRAM problem

Started by wmunlai in comp.arch.embedded14 years ago 3 replies

Hi, we have a board with MCF5235 coldfire connected to a 128Mbit Sdram (ELPIDA EDS1216AGTA 8M words x 16 bit) chip. It is connected with...

Hi, we have a board with MCF5235 coldfire connected to a 128Mbit Sdram (ELPIDA EDS1216AGTA 8M words x 16 bit) chip. It is connected with the following configurations: 16-bit Port,9-Column Address MCF5235 Pin - A16 A15 A14 A13 A12 A11 A10 A9 A18 A19 A20 A21 A22 A23 SDRAM Pin - A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA0 BA1 where BA0,BA1 are the Bank Select Addresses W...


SDRAM configuration

Started by roboman152 in comp.arch.embedded14 years ago 1 reply

Greetings all, I've got a custom AT91RM9200 board Im bringing to life. Current problem is Im pretty sure I've configured the SDRAM...

Greetings all, I've got a custom AT91RM9200 board Im bringing to life. Current problem is Im pretty sure I've configured the SDRAM correctly, however writing to address 0x2000FFFF generates the following on the terminal: (Im running romboot.bin) -F- Data Abort detected I've tested the flash and it does work. Im almost positive I have just missed a mundane register, anything jump out at yo...


www.microcontrollershop.com

Started by werty in comp.arch.embedded13 years ago

Im looking for ARM eval boards ... I look under ARM .... Nothing Nothing Nothing .. I look under ETHERNET .... There it is ! ...

Im looking for ARM eval boards ... I look under ARM .... Nothing Nothing Nothing .. I look under ETHERNET .... There it is ! An ARM 7 , SD card slot CPLD 144 cell EtherNet ... yep all hardware is there ... except SDRAM .... CRIPPLED ! How do you develope with 256k of SDRAM ?!! My GP2X has 64 MEGABYTES ( ARM9 ) I need a 7 or 9 with min SD U...


DDR SDRAM in extended military applications

Started by fpgabuilder in comp.arch.embedded13 years ago

Hi, I am wondering what kind of issues I should look for when designing in DDR SDRAM for extended temperatures. For e.g. does temp....

Hi, I am wondering what kind of issues I should look for when designing in DDR SDRAM for extended temperatures. For e.g. does temp. compensated refresh cycles extend to ambient temperatures of -40 to +85 deg C and over? Any other interesting things that could happen? Thanks and best regards, -sanjay


SDRAM memory width with Atmel AT91RM9200

Started by Stephen Jones in comp.arch.embedded15 years ago 1 reply

We are designing a microcomputer based on the Atmel AT91RM9200 controller. We are gong to give it 128Mb of SDRAM, 4M X 32. I am trying to decide...

We are designing a microcomputer based on the Atmel AT91RM9200 controller. We are gong to give it 128Mb of SDRAM, 4M X 32. I am trying to decide whether to use 2 x 4M x 16 or 1 x 4M x 32. The reference design uses 16 bit wide memories, which appear to be slightly cheaper than the equivalent 32 with perhaps more manufactureres. What do people feel, what are the advantages of each, easier layo...


SDR SDRAM 16-bit vs 32-bit

Started by kalyanamsaritha in comp.arch.embedded12 years ago 8 replies

Given SDR SDRAM with 16-bit width, I have seen both 16-bit and 32-bit (2 x 16-bit) configurations, and am considering which way to go. What...

Given SDR SDRAM with 16-bit width, I have seen both 16-bit and 32-bit (2 x 16-bit) configurations, and am considering which way to go. What are the pros/cons? 1. Cost? 2. Performance? 3. Ease of board layout? [This may have been asked earlier on this forum in some other form ...] Thanks.


Interfacing AT91SAM9260 with cheap SRAM or SRAM?

Started by Mark in comp.arch.embedded14 years ago 2 replies

I was hoping to only spend $1 to $2 for 32k SRAM (or SDRAM) to interface with the AT91SAM9260. Looking at the schematic for the AT91SAM9260...

I was hoping to only spend $1 to $2 for 32k SRAM (or SDRAM) to interface with the AT91SAM9260. Looking at the schematic for the AT91SAM9260 evaluation board, I can see it uses two Micron MT48LC16M16A2 32KB SDRAM chips. Looking on digikey.com and avnet.com, this chip is about $7 in quantities of 10,000, which is much too expensive for the project. Does anyone think I will be able to find 32...


Microblaze OPB SDRAM controller and uClinux

Started by Wisnia in comp.arch.embedded13 years ago

Hi all, I have written my own OPB SDRAM controller, it works fine but I have a problem with EDK and uClinux, I can't set my controller as a...

Hi all, I have written my own OPB SDRAM controller, it works fine but I have a problem with EDK and uClinux, I can't set my controller as a main memory for uCLinux in EDK, but Xilinx SDRAM controler can be set as a main memory for uClinux. Which generic, parameter must I set in my controller to inform EDK that it is defacto a memory controller :)


Understanding connection between MCU and Flash memory

Started by John Boblongo in comp.arch.embedded10 years ago 5 replies

Hi, I am a software engineer, with little experience of electronics, trying to understand some more hardware. I am currently studying the...

Hi, I am a software engineer, with little experience of electronics, trying to understand some more hardware. I am currently studying the schematics for Samsung's SMDK2410X built around an ARM9 S3C2410X CPU, more particularly how SDRAM and Flash are connected to the CPU (I'm guessing this is what I will have to configure first in the boot software I intend to write). For SDRAM, th...


AT91RM9200 low voltage SDRAM...

Started by Hijax in comp.arch.embedded15 years ago 1 reply

Hello, Is it possible to use a low voltage (1.8V) SDRAM chip with the AT91RM9200? All the schematics i've seen or the finished boards uses...

Hello, Is it possible to use a low voltage (1.8V) SDRAM chip with the AT91RM9200? All the schematics i've seen or the finished boards uses 3.3V ones. Regards, Arek


Image processing with DSP's

Started by Martin Euredjian in comp.arch.embedded16 years ago 2 replies

Interested in opinions and thoughts as to which DSP's might be good/best for real-time image processing. We currently use FPGA's. It would...

Interested in opinions and thoughts as to which DSP's might be good/best for real-time image processing. We currently use FPGA's. It would be interesting to learn what can be done with DSP's. Are there any that have efficient ways to implement such things as FIR filters, for example, or matrix transforms, etc.? How about dealing with SDRAM/DDR SDRAM frame stores? Are there any that can ...


Compact Flash (or SDRAM) to SPI interface

Started by Al Clark in comp.arch.embedded15 years ago 7 replies

Does anyone have a source (or design) for a CF reader with a SPI interface? An alternative would be a card that had at least 256M Bytes of...

Does anyone have a source (or design) for a CF reader with a SPI interface? An alternative would be a card that had at least 256M Bytes of SDRAM. The SPI interface on this card would be configured as a slave. -- Al Clark Danville Signal Processing, Inc. -------------------------------------------------------------------- Purveyors of Fine DSP Hardware and other Cool Stuff Availab...


Weird memory design in M5282EVB

Started by in comp.arch.embedded16 years ago 3 replies

Hello! I just had a look at the manual to the motorola coldfire 5282 evb, and I?d like to understand why they connected the sdram-chips to...

Hello! I just had a look at the manual to the motorola coldfire 5282 evb, and I?d like to understand why they connected the sdram-chips to the processor the way they did. The schematics can be found at http://e-www.motorola.com/files/soft_dev_tools/hardware_tools/printed_circuit_boards/M5282EVB-SC H.pdf In short: They connected the chips to A9...A23. A0...A8 are not used by sdram, b