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why:memory read/write fine, but debugger halts

Started by John Black in comp.arch.embedded20 years ago 1 reply

Hi, I have a powerpc embedded system, in it there is a sdram chip on the bus, if I run memory test on the sdram and the test program is...

Hi, I have a powerpc embedded system, in it there is a sdram chip on the bus, if I run memory test on the sdram and the test program is loaded from powerpc cache, the test passes. But if I use the debugger through JTAG for powerpc to load the program into sdram, the debugger just halts there. Without going into the details, could you think of any reason for this? I am sure the debugg...


ARM7 + SDRAM

Started by Karl Katt in comp.arch.embedded19 years ago 1 reply

Hello! I just wanted to know if it is possible to access e.g. 16Mbyte SDRAM with an LPC2214 with an ARM7TDMI core? I think the necessary pins...

Hello! I just wanted to know if it is possible to access e.g. 16Mbyte SDRAM with an LPC2214 with an ARM7TDMI core? I think the necessary pins are all lined out. How to connect the RAM chip to the controller? I need this RAM for running ucLinux on it. Thanks a lot for the answers, Karl


SDRAM with YFBGA

Started by phateshawn in comp.arch.embedded17 years ago 2 replies

Hi all, I would like to solder a mobile SDRAM with YFBGA package to a PCB. I don't have a heating oven to solder it in a conventional way. Can...

Hi all, I would like to solder a mobile SDRAM with YFBGA package to a PCB. I don't have a heating oven to solder it in a conventional way. Can anybody suggest me an inexpensive way to achieve this? Thanks, -Phate


coldfire 5235 and SDRAM problem

Started by wmunlai in comp.arch.embedded17 years ago 3 replies

Hi, we have a board with MCF5235 coldfire connected to a 128Mbit Sdram (ELPIDA EDS1216AGTA 8M words x 16 bit) chip. It is connected with...

Hi, we have a board with MCF5235 coldfire connected to a 128Mbit Sdram (ELPIDA EDS1216AGTA 8M words x 16 bit) chip. It is connected with the following configurations: 16-bit Port,9-Column Address MCF5235 Pin - A16 A15 A14 A13 A12 A11 A10 A9 A18 A19 A20 A21 A22 A23 SDRAM Pin - A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BA0 BA1 where BA0,BA1 are the Bank Select Addresses W...


SDRAM configuration

Started by roboman152 in comp.arch.embedded18 years ago 1 reply

Greetings all, I've got a custom AT91RM9200 board Im bringing to life. Current problem is Im pretty sure I've configured the SDRAM...

Greetings all, I've got a custom AT91RM9200 board Im bringing to life. Current problem is Im pretty sure I've configured the SDRAM correctly, however writing to address 0x2000FFFF generates the following on the terminal: (Im running romboot.bin) -F- Data Abort detected I've tested the flash and it does work. Im almost positive I have just missed a mundane register, anything jump out at yo...


SDRAM memory width with Atmel AT91RM9200

Started by Stephen Jones in comp.arch.embedded19 years ago 1 reply

We are designing a microcomputer based on the Atmel AT91RM9200 controller. We are gong to give it 128Mb of SDRAM, 4M X 32. I am trying to decide...

We are designing a microcomputer based on the Atmel AT91RM9200 controller. We are gong to give it 128Mb of SDRAM, 4M X 32. I am trying to decide whether to use 2 x 4M x 16 or 1 x 4M x 32. The reference design uses 16 bit wide memories, which appear to be slightly cheaper than the equivalent 32 with perhaps more manufactureres. What do people feel, what are the advantages of each, easier layo...


SDR SDRAM 16-bit vs 32-bit

Started by kalyanamsaritha in comp.arch.embedded16 years ago 8 replies

Given SDR SDRAM with 16-bit width, I have seen both 16-bit and 32-bit (2 x 16-bit) configurations, and am considering which way to go. What...

Given SDR SDRAM with 16-bit width, I have seen both 16-bit and 32-bit (2 x 16-bit) configurations, and am considering which way to go. What are the pros/cons? 1. Cost? 2. Performance? 3. Ease of board layout? [This may have been asked earlier on this forum in some other form ...] Thanks.


Interfacing AT91SAM9260 with cheap SRAM or SRAM?

Started by Mark in comp.arch.embedded17 years ago 2 replies

I was hoping to only spend $1 to $2 for 32k SRAM (or SDRAM) to interface with the AT91SAM9260. Looking at the schematic for the AT91SAM9260...

I was hoping to only spend $1 to $2 for 32k SRAM (or SDRAM) to interface with the AT91SAM9260. Looking at the schematic for the AT91SAM9260 evaluation board, I can see it uses two Micron MT48LC16M16A2 32KB SDRAM chips. Looking on digikey.com and avnet.com, this chip is about $7 in quantities of 10,000, which is much too expensive for the project. Does anyone think I will be able to find 32...


Understanding connection between MCU and Flash memory

Started by John Boblongo in comp.arch.embedded14 years ago 5 replies

Hi, I am a software engineer, with little experience of electronics, trying to understand some more hardware. I am currently studying the...

Hi, I am a software engineer, with little experience of electronics, trying to understand some more hardware. I am currently studying the schematics for Samsung's SMDK2410X built around an ARM9 S3C2410X CPU, more particularly how SDRAM and Flash are connected to the CPU (I'm guessing this is what I will have to configure first in the boot software I intend to write). For SDRAM, th...


AT91RM9200 low voltage SDRAM...

Started by Hijax in comp.arch.embedded19 years ago 1 reply

Hello, Is it possible to use a low voltage (1.8V) SDRAM chip with the AT91RM9200? All the schematics i've seen or the finished boards uses...

Hello, Is it possible to use a low voltage (1.8V) SDRAM chip with the AT91RM9200? All the schematics i've seen or the finished boards uses 3.3V ones. Regards, Arek


Image processing with DSP's

Started by Martin Euredjian in comp.arch.embedded20 years ago 2 replies

Interested in opinions and thoughts as to which DSP's might be good/best for real-time image processing. We currently use FPGA's. It would...

Interested in opinions and thoughts as to which DSP's might be good/best for real-time image processing. We currently use FPGA's. It would be interesting to learn what can be done with DSP's. Are there any that have efficient ways to implement such things as FIR filters, for example, or matrix transforms, etc.? How about dealing with SDRAM/DDR SDRAM frame stores? Are there any that can ...


Compact Flash (or SDRAM) to SPI interface

Started by Al Clark in comp.arch.embedded18 years ago 7 replies

Does anyone have a source (or design) for a CF reader with a SPI interface? An alternative would be a card that had at least 256M Bytes of...

Does anyone have a source (or design) for a CF reader with a SPI interface? An alternative would be a card that had at least 256M Bytes of SDRAM. The SPI interface on this card would be configured as a slave. -- Al Clark Danville Signal Processing, Inc. -------------------------------------------------------------------- Purveyors of Fine DSP Hardware and other Cool Stuff Availab...


Weird memory design in M5282EVB

Started by in comp.arch.embedded20 years ago 3 replies

Hello! I just had a look at the manual to the motorola coldfire 5282 evb, and I?d like to understand why they connected the sdram-chips to...

Hello! I just had a look at the manual to the motorola coldfire 5282 evb, and I?d like to understand why they connected the sdram-chips to the processor the way they did. The schematics can be found at http://e-www.motorola.com/files/soft_dev_tools/hardware_tools/printed_circuit_boards/M5282EVB-SC H.pdf In short: They connected the chips to A9...A23. A0...A8 are not used by sdram, b


Address Mapping LPC24XX

Started by Mad I.D. in comp.arch.embedded15 years ago 1 reply

I just connected a 32MB of x32 SDRAM (one IC) on LPC2478 chip and unfortunately have some doubts. SDRAM Spec: 4k Row (12bits) x 512 column...

I just connected a 32MB of x32 SDRAM (one IC) on LPC2478 chip and unfortunately have some doubts. SDRAM Spec: 4k Row (12bits) x 512 column (9bits) x 32 bits. I was having trouble to figure out where to connect bank address pins and found in some other document (not user manual) that A14:A11-> BA1:BA0 should be OK. Why is this not documented in user manual? Did I miss something ? [A12 is


Trace length for SDRAM lines?

Started by Not Really Me in comp.arch.embedded17 years ago 4 replies

How important is the trace length balance on signal lines to SDRAM? I recall coming across a document saying that the trace lengths needed to...

How important is the trace length balance on signal lines to SDRAM? I recall coming across a document saying that the trace lengths needed to have less than .5 inch difference from shortest to longest. But I think that was a DDR2 doc. I see some very obvious S curves in the lines on an Atmel SAM9261 EK board that uses PC100 speed SDRAMS. We will be using similar parts on a new des...


Problem with SDRAM Memory

Started by Giuseppe Monteleone in comp.arch.embedded18 years ago 1 reply

Hi All I have some problem with SDRAM memory interface. I'am using a SHARP LH79525 ARM controller. when i give a precharge command i see...

Hi All I have some problem with SDRAM memory interface. I'am using a SHARP LH79525 ARM controller. when i give a precharge command i see with a logical analyzer a wrong comand WE=L CS=L RAS=H CAS=L A10=H whitch seem to be a write command There are some configuration that can take a write command as precharge ? Thanks Ing Giuseppe Monteleone


at91rm9200 Board gets reset spontaneously

Started by Mayank Kaushik in comp.arch.embedded19 years ago 2 replies

Hi , Im trying to build a Development board for the AT91RM9200 and am using SDRAM in 16 bit mode , and 2 Mb Flash. I have managed to Store...

Hi , Im trying to build a Development board for the AT91RM9200 and am using SDRAM in 16 bit mode , and 2 Mb Flash. I have managed to Store U-boot in the Dataflash and to get it to boot from it. The Atmel Utility picks up U-boot from the Flash and runs it from SDRAM. The problem im having is that spontaneously while running , the System automatically Resets. This was not happening prior ...


gcc: NOLOAD and .noinit

Started by pozz in comp.arch.embedded2 years ago 7 replies

I usually don't touch linker script of my development system, sincerely I can't read every details of a linker script, so I'm in trouble...

I usually don't touch linker script of my development system, sincerely I can't read every details of a linker script, so I'm in trouble now. As explained in my previous post, I need to avoid zeroing a static big variable, because it is allocated in SDRAM and SDRAM isn't available when zeroing of bss sections (and initialization of data sections) occurs. My development system allows me...


Put method in specific memory

Started by Tom in comp.arch.embedded20 years ago 8 replies

Hi, I was wondering if it is possible to put a certain method in your program in a specific memory ? For example, I have a slow sdram...

Hi, I was wondering if it is possible to put a certain method in your program in a specific memory ? For example, I have a slow sdram and a fast ddr ram available. I want the ddr ram to contain a fft method, all other code should be stored in the sdram... Can this be done with linker scripts ? Thanks, Tom


interrupt vector on pxa255

Started by Jacek in comp.arch.embedded18 years ago 1 reply

Hi all, could help me to understand how to relocate interrupts on the pxa255 processors? The arm architecture has the interrupt vector at...

Hi all, could help me to understand how to relocate interrupts on the pxa255 processors? The arm architecture has the interrupt vector at 0x0 or 0xFFFF0000 address. How to place the interrupt vector in the SDRAM memory while this procesor has the SDRAM memory placed at 0xa0000000. I tryed to understand the uboot start code and other loaders but they have the interrupt vector placed at...