EmbeddedRelated.com

MPC8641D (dual e600 core) memory latency?

Started by Joseph H Allen in comp.arch.embedded17 years ago 6 replies

Does anyone know what the SDRAM memory latency is going to be for this new embedded controller chip? Latencies on past PPCs were abysmal (~280...

Does anyone know what the SDRAM memory latency is going to be for this new embedded controller chip? Latencies on past PPCs were abysmal (~280 ns for MPC7447 1.4 GHz with Marvell Discovery memory controller). I'm hoping the MPC8641D does better with its on-chip memory controller. It would be nice if the latency approached the SDRAM tRC, like modern x86s. -- /* jhallen@world.std.com A...


AT91RM9200 and 16-bit SDRAM not working

Started by Stef in comp.arch.embedded18 years ago 13 replies

Hello All, I am trying to get a 16-bit SDRAM (MT48LC16M16A2-75) to work with the AT91RM9200 and no matter what I try, it fails to work...

Hello All, I am trying to get a 16-bit SDRAM (MT48LC16M16A2-75) to work with the AT91RM9200 and no matter what I try, it fails to work properly: Hardware connections: AT91RM9200 MT48LC16M16A2 ---------- ------------- D0-15 DQ0-15 A2-A11 A0-A9 SDA10 A10 A13-A14 A11-A12 BA0/1 BA0/1 SDCKE CKE SDCK CLK \BS0/1 DQML/H \RAS \RAS \...


CPU with SDRAM, USB, MAC, CAN, ADC and PWM ?

Started by Vladimir Vassilevsky in comp.arch.embedded14 years ago 6 replies

Is there such CPU that has SDRAM controller, USB host/slave, Ethernet MAC, CAN as well as utility ADC and several PWM channels all in one...

Is there such CPU that has SDRAM controller, USB host/slave, Ethernet MAC, CAN as well as utility ADC and several PWM channels all in one chip? The performance is not very critical; lower cost is important. There are plenty of choices that have either (Ethernet + USB) or (ADC + PWM), but it looks like none of them have both. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant ...


SDRAM data bus width & linux

Started by solarst in comp.arch.embedded15 years ago 4 replies

Due to space limitations, our small embedded system (whicih uses a Samsung S3C2440A processor) uses one SDRAM chip. The address bus is 32 bits,...

Due to space limitations, our small embedded system (whicih uses a Samsung S3C2440A processor) uses one SDRAM chip. The address bus is 32 bits, but the data bus is only 16 bits. Is there a special option we can configure on Linux so it knows to use a 16-bit data bus? Similarly, are there options for bootloaders such as vivi or U-boot to specify usage of a 16-bit data bus with a 32-bit address? ...


cutting down opb_clk cycles while read-write BRAM-DDR in FPGA

Started by chakra in comp.arch.embedded15 years ago 1 reply

Hello all, I am working on a project which involves a simple BRAM, OPB-PLB, Microblaze/PPC, and opb_ddr_sdram controller. I am reading 1280...

Hello all, I am working on a project which involves a simple BRAM, OPB-PLB, Microblaze/PPC, and opb_ddr_sdram controller. I am reading 1280 bytes of data from bram (32 bits each read, thus a total of 320 reads) and writing it to DDR sdram. i am using Xilinx standalone OS. i use the command XIo_in32(addr) to read from bram and use XIo_out32(addr,data) to write to DDR sdram controller. h...


External SPI Flash for storing data

Started by pozz in comp.arch.embedded5 years ago 15 replies

I have a board with Cortex-M3 NXP LPC1875 MCU with 512kB internal Flash, one 8MB external SDRAM and 2MB external SPI Flash. The external Flash...

I have a board with Cortex-M3 NXP LPC1875 MCU with 512kB internal Flash, one 8MB external SDRAM and 2MB external SPI Flash. The external Flash is connected to a normal SPI, not SPIFI (in other words, it isn't mapped to the internal address space). Insted the SDRAM is mapped to the internal address space, starting from address 0xA000 0000. The application will use a 480x272 RGB LCD conne...


Is there any good arm9 chip contains excellent float multiple performance?

Started by Readon Shaw in comp.arch.embedded18 years ago 6 replies

A full functional SOC is prefered, LCD controller, A/D, PS/2 keyboards & mouse, SDRAM, etc. Any suggestion?

A full functional SOC is prefered, LCD controller, A/D, PS/2 keyboards & mouse, SDRAM, etc. Any suggestion?


how can we access sdram from atmel 8051

Started by gaus in comp.arch.embedded17 years ago 2 replies

hello ......... can some buddy explain me the programming to access the sd ram throgh 8051 its very urgent........please tell me...

hello ......... can some buddy explain me the programming to access the sd ram throgh 8051 its very urgent........please tell me ...................or give the solution in my email id g.gaurav.s@gmail.com


PXA270 Development board

Started by Anonymous in comp.arch.embedded18 years ago 2 replies

Hello, I am looking for a PXA270 based board with 128MB SDRAM,PS/2 mouse and keyboard ports, CF slot and a working linux port. I am trying to...

Hello, I am looking for a PXA270 based board with 128MB SDRAM,PS/2 mouse and keyboard ports, CF slot and a working linux port. I am trying to build a web browsing station. Thanks for your suggestions. Kanchan


linux dies on custom at91rm9200 board

Started by amstewa2 in comp.arch.embedded18 years ago 1 reply

Hello all Im trying to get linux up and running on my system. I have 16MB of SDRAM at 0x20000000 and 2MB of dataflash. I've started with the...

Hello all Im trying to get linux up and running on my system. I have 16MB of SDRAM at 0x20000000 and 2MB of dataflash. I've started with the at91rm9200dk files in the kernel as my start point, and I can get it to boot if and only if I disable my dCache. Im imaging there is a setting somewhere Im over looking that is still trying to map the caches with 32MB of ram (which the dk has) but I ha...


Verilog modeling.

Started by Artem in comp.arch.embedded19 years ago 1 reply

Hi all. I have a "Verilog Behavioral Model of Synchronous 128M SDRAM". I have a Quartus II. How I can use this model in this software? I have...

Hi all. I have a "Verilog Behavioral Model of Synchronous 128M SDRAM". I have a Quartus II. How I can use this model in this software? I have read in manual that verilog simulation is not supported by quartus.


Suitable DRAM

Started by Dan N in comp.arch.embedded18 years ago 2 replies

Can someone suggest to me a suitable DRAM manufacturer and package. I've been looking at an Epson VGA controller for an embedded...

Can someone suggest to me a suitable DRAM manufacturer and package. I've been looking at an Epson VGA controller for an embedded application. It specifies either FPM-DRAM or EDO-DRAM, 1M x 16 bits. Can you even get DRAM that small these days? Would it be possible to substitute SDRAM or is it a different configuration? Dan


LH7A400 Evaluation Board

Started by Heiner Karlin in comp.arch.embedded18 years ago 1 reply

Hello, Does anybody know an evaluation board for the LH7A400 Controller, except the Logic PD Zoom card engine kits? I am looking for a...

Hello, Does anybody know an evaluation board for the LH7A400 Controller, except the Logic PD Zoom card engine kits? I am looking for a board with SRAM instead of SDRam, to test to which level power consumption can be brought. Thanks for all hints. H. Karlin


Xilinx Virtex5 ILOGIC LOCations

Started by SCO in comp.arch.embedded16 years ago

Hi, I have generated a DDR2 SDRAM interface with MIG2.0. It gave me a nice project but I have to change the pin locations. After I make...

Hi, I have generated a DDR2 SDRAM interface with MIG2.0. It gave me a nice project but I have to change the pin locations. After I make the necessary changes I see that I have to tweak the ILOGIC, IODELAY element locations also. They have location names like ---------------------------------------------------------------------- INST "*/gen_dqs[0].u_iob_dqs/u_iddr_dq_ce" LOC = "ILOGIC_X0Y30...


LPC3180 ARM uC power supply

Started by kalyanamsaritha in comp.arch.embedded16 years ago 11 replies

LPC3180 is a ARM926EJS core which uses a 1.2V for the core, sdram, etc, and 1.8V/3.0V for IO. What power supply/regulators would be...

LPC3180 is a ARM926EJS core which uses a 1.2V for the core, sdram, etc, and 1.8V/3.0V for IO. What power supply/regulators would be recommended? Would a single regulator be recommened to achieve these multiple voltages? And how? Thanks.


BlackFin BF531 and MT48LC4M16

Started by Jookie in comp.arch.embedded14 years ago 11 replies

Hello, this is a question to guys with some experience with AD BlackFin BF531 (or BF533) - normally I would ask on blackfin.org, but it was...

Hello, this is a question to guys with some experience with AD BlackFin BF531 (or BF533) - normally I would ask on blackfin.org, but it was shut down some time ago... Anyway... I've connected MT46LC4M16 (1 Meg x 16 x 4 banks) SDRAM to my BF531, I've initialized it (although I'm not sure about those settings), but I got some issues with it. According to datasheet of BF531 the smallest possib...


ARM S3C24x0 based development kits ?

Started by leon20008 in comp.arch.embedded16 years ago 3 replies

Hi friends, for an experimental project we shall need an ARM9 based development kit, with the SDRAM of at least 64M, ethernet, audio and...

Hi friends, for an experimental project we shall need an ARM9 based development kit, with the SDRAM of at least 64M, ethernet, audio and LCD connection. I have been looking around for a long time and found nothing exactly meets my requirement. Since you guys have much more experiences in this area than me, would you please give me some advice and recommendation? thanks a lot! Leon


VGA/SVGA controller

Started by Dzun in comp.arch.embedded13 years ago 7 replies

Hi all, I'm looking for some card/device to display text/graphics on my LCD - data source is small arm uP. I found some module from Mylium (LAVA...

Hi all, I'm looking for some card/device to display text/graphics on my LCD - data source is small arm uP. I found some module from Mylium (LAVA 10 www.mylium.es) - and I'm wondering if anyone had an experience with it? Is it really 800x600? I can't display lower resolution than this on my monitor.Can I reprogram it (it's based on FPGA)? How can I use the onboard SDRAM? Are there any other solut...


Basic DVI example?

Started by Colin Anderson in comp.arch.embedded19 years ago 1 reply

Has anyone here worked on or have run across a hobbyist-scale project using DVI video/graphics? I would like to experiment with a...

Has anyone here worked on or have run across a hobbyist-scale project using DVI video/graphics? I would like to experiment with a DVI transmitter fed by a dedicated SDRAM framebuffer, but I do not know where to start. My experience is with PIC- and SX-based projects, but I'm about to start working with FPGA projects. Any advice is appreciated!


MCF5270 versus MCF5208

Started by okalex in comp.arch.embedded17 years ago 1 reply

Hello all, I'm trying to choose a microprocessor for a new design and would like to get input from members of the community who have used...

Hello all, I'm trying to choose a microprocessor for a new design and would like to get input from members of the community who have used these processors. The requirements are an Ethernet MAC (PHY would be nice, but haven't found a chip which meets this plus the other requirements), I2C, external memory bus to access 4MB SRAM (or SDRAM) buffer, hobbyist-friendly packaging (not BGA, prefe...