Longest path length from SDRAM controller to DRAM?

Started by Anonymous in comp.arch.embedded13 years ago 14 replies

I'm trying to design a test setup to do radiation experiments on SDR DRAM for my thesis. The DRAM needs to be isolated from our control unit...

I'm trying to design a test setup to do radiation experiments on SDR DRAM for my thesis. The DRAM needs to be isolated from our control unit b/c I'm worried about contaminating our results by having our control circuitry in there too - b/c then how do we know if it's the DRAM or "something" else that fails. So my question is, what's the longest length I can run a ribbon cable (or other...


Help with programming an 8272 to work with Micron MT48KC16M16A2 RAM

Started by Larr...@gmail.com in comp.arch.embedded13 years ago 2 replies

We are trying to program a MPC8272 to work with some Micron MT48KC16M16A2 SDRAM, and we are not having much success. I am wondering if anyone...

We are trying to program a MPC8272 to work with some Micron MT48KC16M16A2 SDRAM, and we are not having much success. I am wondering if anyone has a link to either an app note that details how to program the memory controller registers to work with this memory or some sample code that does it. Thanks! -larry


AT91RM9200 and AC97 codec - not recommended ?

Started by Pelos in comp.arch.embedded14 years ago 4 replies

Hi everybody. I'm finishing my RM9200 board (32MB SDRAM, 2MB SPI NOR, Smart Media, RTL8201). Now I need to choose te audio interface. First -...

Hi everybody. I'm finishing my RM9200 board (32MB SDRAM, 2MB SPI NOR, Smart Media, RTL8201). Now I need to choose te audio interface. First - I was thinking about AC97 codec - like National's LM4549 because I saw this chip in some RM9000 SDK boards. But I saw some posts with information that AT91RM9200 and its SSC doesn't work with AC97 codec. Can somebody confirm (or better not ;) ) t...


Bringing up ecos on Integrator/AP.

Started by ivy in comp.arch.embedded15 years ago 2 replies

Dear friends, I am very newbie to this list and also ecos... I have a Integrator /AP (ARM920T) Evaluation Board. It has 128MB...

Dear friends, I am very newbie to this list and also ecos... I have a Integrator /AP (ARM920T) Evaluation Board. It has 128MB SDRAM. Actually m trying to run ecos + application program on it. Basically i dont know th exact procedure to follow.. My Evalutation Board has inbuilt ARM BootPROM. Using that have downloaded prebuilt Redboot to Flash. Redboot is working ...


Regarding cold boot and SDRAM status

Started by ssubbarayan in comp.arch.embedded14 years ago 1 reply

Dear all, Recently happened to investigate an exception issue due to raising of exceptions from ISRs. I am using ARM based custom processor...

Dear all, Recently happened to investigate an exception issue due to raising of exceptions from ISRs. I am using ARM based custom processor with vxworks 5.5.I have the following doubt: The vxworks manual states that when ever an exception happens from ISR the system will get rebooted and it will print the reason behind exception on system console. My doubt is where exactly in physical me...


dual PowerPC booting

Started by Anonymous in comp.arch.embedded13 years ago

Hi, I have a system with 2 PowerPCs connected to the same PLB. Each PPC has a ISOCM connected memory mapped at around 0xffff_ffff. I...

Hi, I have a system with 2 PowerPCs connected to the same PLB. Each PPC has a ISOCM connected memory mapped at around 0xffff_ffff. I download the bitfile with bootloop programs, then I open XMD, download program for PPC0 and PPC1 in an SDRAM at different address ranges. Run PPC 0 then 1 and everything works fine. However; I want to get rid of the ISOCM and when I do that the system st...


Changing refresh rate for DRAM while in operation?

Started by Anonymous in comp.arch.embedded13 years ago 31 replies

Hi, I'm trying to control a SDR SDRAM (Micron 64Mbit chip) using an Altera DE2 board. I've gotten the hardware interface squared away...

Hi, I'm trying to control a SDR SDRAM (Micron 64Mbit chip) using an Altera DE2 board. I've gotten the hardware interface squared away (thanks everyone for your help!). Now it's the tricky stuff. Any one have an idea how I can change the refresh rate while the RAM is in operation? I have the DRAM interface built using the SOPC builder that comes with Quartus II using the NIOS II system...


AT91RM9200 bootloaders (to boot into u-boot)

Started by Darrell Harmon in comp.arch.embedded16 years ago 2 replies

I have a board based on the AT91RM9200, and want to boot from SPI dataflash. The loader will proceed to boot u-boot (Which is too big for the...

I have a board based on the AT91RM9200, and want to boot from SPI dataflash. The loader will proceed to boot u-boot (Which is too big for the ROM bootloader to handle). I have read the atmel appnote on that, but boot program will need to be changed. My SDRAM is configured differently than the DK. The program with the appnote includes source, but it is missing quite a bit to be able to be ...


DMA time varying widely on MPC8272

Started by Bill in comp.arch.embedded13 years ago

In my Linux device driver, I am frequently DMA'ing to the SDRAM. My board has an MPC8272 processor. I have noticed the time from the start of...

In my Linux device driver, I am frequently DMA'ing to the SDRAM. My board has an MPC8272 processor. I have noticed the time from the start of the DMA to when I get the DMA interrupt can vary as much as 100X. The amount of data being DMA'd is consistent. What could account for such a wide variation? Is there anything I can do to insure that the DMA takes place in a timely manner every tim...


DDR / DDR2 memory controllers

Started by Richard in comp.arch.embedded16 years ago 10 replies

I've got an application that's RAM-hungry (64MB+), but doesn't need a lot of horsepower. Does anyone have experience using a memory controller...

I've got an application that's RAM-hungry (64MB+), but doesn't need a lot of horsepower. Does anyone have experience using a memory controller to connect an 8- or 16-bit GPIO bus to DDR or DDR2 RAM? We've looked at hacking the timing for SDRAM - it looks workable via GPIO, but it also seems to have a short future. The option of using cheap DIMMs looks great (even though the sockets are ...


want to experiment, have micromint rtc-52 board

Started by Anonymous in comp.arch.embedded15 years ago 1 reply

About 15 years ago, I bought a micromint rtc-52 board and ended up just using a plc for the project. So here I am today, with the board and an...

About 15 years ago, I bought a micromint rtc-52 board and ended up just using a plc for the project. So here I am today, with the board and an itch to do something with it to learn a bit. The board powered up fine. Basic on it is very basic. Sadly, the NV SDRAM is very V. I guess the DS1235YW chip had a 5 year life. It looks like I can put a DS1230Y in and move up from 8Kx8 to 32kx8. ...


Not able to boot from NAND

Started by vinaysandeep in comp.arch.embedded11 years ago 3 replies

We are not able to boot from NAND flash on our custom board with the following hardware. AT91SAM9263 ...

We are not able to boot from NAND flash on our custom board with the following hardware. AT91SAM9263 64 MB NAND flash (Page size: 512 byte + 16 byte). (Company: ST/numynox) 64 MB SDRAM 2. The Bootstrap and U-Boot is located in the NAND flash at the offsets 0x0 and 0x4000 respectively. 3. However, if the Bootstr...


USB Flash Drive Problem after switching to PSRAM

Started by sg83 in comp.arch.embedded12 years ago

Hi everyone, My development board has two memory banks, SDRAM (128MB) and PSRAM (16MB). I've got the linux kernel booting from only the PSRAM,...

Hi everyone, My development board has two memory banks, SDRAM (128MB) and PSRAM (16MB). I've got the linux kernel booting from only the PSRAM, but I can't get a USB Flash Drive to work properly. It is being detected, but I get the following messages: --------------------------------------------------------------- usb 1-1: reset high speed USB device using fsl-ehci and address 4 sd 2:0:0:0: [...


Linux on Capio II (Geode) ?

Started by Phil in comp.arch.embedded16 years ago 5 replies

Hi all. Has anyone run Linux from the Disk-on-Chip on these little beasts? Bought 11 of them for about $2 apiece. They have 2xUSB, sound,...

Hi all. Has anyone run Linux from the Disk-on-Chip on these little beasts? Bought 11 of them for about $2 apiece. They have 2xUSB, sound, e100 ethernet, 16MB DOC, 64MB 144 pin SODIMM SDRAM. I have a Rocky 558EV SBC running SuSE 9.0 with DOC socket to transfer OS images, but even with all DOC support compiled into the SuSE 2.4.21 kernel, fdisk, dd, mkfs, etc. seem to freeze up when access...


PCI bus controller?

Started by David Huseby in comp.arch.embedded16 years ago 10 replies

Does anybody know of any good PCI bus controllers that are suitable for use hobby boards. I've been thinking about designing a fully fledged PC...

Does anybody know of any good PCI bus controllers that are suitable for use hobby boards. I've been thinking about designing a fully fledged PC using a ColdFire chip with SDRAM, PCI, USB and IDE. Getting Linux up and running shouldn't be a problem if I use common USB and PCI chips. Any suggestions and sources for nice PCI bus controllers? Dave


Regarding calculation of free memory

Started by ssubbarayan in comp.arch.embedded15 years ago 62 replies

Gurus, I was just wondering what could be the best possible way to calculate free memory while our code is running in SDRAM.I have used vxworks...

Gurus, I was just wondering what could be the best possible way to calculate free memory while our code is running in SDRAM.I have used vxworks and it uses a approach to calculate the free memory as follows: Fill up the entire stack with 0xeeeee and then when you start using the stack,if at all a particular address in memory is used,the value of 0xeeeee in that location should be overwritten...


Looking for 1G NAND Flash

Started by Joseph Goldburg in comp.arch.embedded10 years ago 4 replies

Hi All, I'm looking for reliable sources of 1G NAND flash x16 preferred but can accept x8 BGA preferred but can accept TSOP, TSSOP 3V,...

Hi All, I'm looking for reliable sources of 1G NAND flash x16 preferred but can accept x8 BGA preferred but can accept TSOP, TSSOP 3V, 3v3 volt preferred but may be able to accpet 1v8. qty ~ 8k PA Do you have any suggested MFG's and suggested part No's that may fit the requirement? It seems that NAND and SDRAM see to be quite market volatile Thanks in advance Regs Joe ...


LH79520 interrupt problem

Started by Anonymous in comp.arch.embedded13 years ago 2 replies

hi, I'm using a custom designed board having LH79520 with 32MB micron SDRAM & 8MB flash. Very similar to LogicPD board, but without the extras...

hi, I'm using a custom designed board having LH79520 with 32MB micron SDRAM & 8MB flash. Very similar to LogicPD board, but without the extras (lan, audio, CPLD, buffers etc). It does have a external reset chip. The board works fine when no interrupts are used. However, when I try to use the timer interrupt, it works intermittently between power-ups. Meaning, the interrupt is working afte...


Question about the speed of SPI RAM

Started by Like2Learn in comp.arch.embedded9 years ago 15 replies

Hi there, We found we had to add an external RAM (SRAM or SDRAM) at the late stage of electrical design. Basically there are only 2 GPIO pins...

Hi there, We found we had to add an external RAM (SRAM or SDRAM) at the late stage of electrical design. Basically there are only 2 GPIO pins still available, otherwise the RAM has to share with other peripherals, such as SPI and I2C. I prefer to connect the external RAM with SPI bus. However, I am not sure if it is fast enough for RAM read/write. Does anybody know the typical speed of SPI...


External SPI Flash for storing data

Started by pozz in comp.arch.embedded3 months ago 3 replies

Maybe someone remember the thread[1] that I created some months ago. I was searching a simple way to save on the external SPI Flash some...

Maybe someone remember the thread[1] that I created some months ago. I was searching a simple way to save on the external SPI Flash some constant data (mainly bitmaps) and copying them to SDRAM at startup. I finally put my hands on that project again and I think I've found a good solution. The MCU (LPC1785 from NXP) has an internal Flash memory starting from 0x0000 0000 and an extern...