LPC1102, World's smallest 32-bit ARM MCU in a 5mm2 pckg

Started by An Schwob in the USA in comp.arch.embedded13 years ago 11 replies

Hi, ever heard about a 32-bit microcontroller this tiny? I am familiar with the Silabs devices that are available in similar packages but this...

Hi, ever heard about a 32-bit microcontroller this tiny? I am familiar with the Silabs devices that are available in similar packages but this time it is an ARM Cortex-M0 and it has more I/O and memory than I thought. 10-bit ADC, 4 timers, UART, SPI, 32K Flash and 8K SRAM, really not bad for such a grain of silicon. Check it out. http://www.mcu-related.com An Schwob


ARM7 selection question

Started by Johnny in comp.arch.embedded19 years ago 3 replies

I am looking for the an ARM7 system with the following features: * 256kB on-chip SRAM. * Ethernet MAC (Could be external) * USB Device...

I am looking for the an ARM7 system with the following features: * 256kB on-chip SRAM. * Ethernet MAC (Could be external) * USB Device interface (Could be external) * External interface for several MB of flash memory. My application: * No more than about 10 MIPS processing speed, plus any extra for servicing Ethernet and USB. * Cost sensitive. * Planned to stay in production for 5 year...


Which MCU has these features?

Started by Ghazan Haider in comp.arch.embedded18 years ago 10 replies

The linux-tiny project has reduced the linux kernel down to ~300kb, able to run in 2MB of RAM. With uclibc and busyboy, I can have a running...

The linux-tiny project has reduced the linux kernel down to ~300kb, able to run in 2MB of RAM. With uclibc and busyboy, I can have a running system in under 2MB of flash. So I started looking for ARM MCUs, a few have 2MB flash onboard, one from atmel has 2MB SRAM onboard, but I couldnt find any that has both. ARMs no limitation, but it shouldnt be as inefficient as x86 with power, and shou...


Clarification about Atmega128

Started by Tamilmaran S in comp.arch.embedded18 years ago 4 replies

Hi all, We are using atmega128 for one of our project. I heard that it is a 8 bit microcontroller, ok its accumulator and its data bus are...

Hi all, We are using atmega128 for one of our project. I heard that it is a 8 bit microcontroller, ok its accumulator and its data bus are 8 bit width. Then what about is address bus, is it also 8 bit width? Because for this 8 bit it can address only up to 2^8 = 256 location. Then how it can address 4096 SRAM (4K) and 131072 Flash (128K). Can anybody clear me on this doubt? Thank you ...


Clarification on Atmega128

Started by Tamilmaran S in comp.arch.embedded18 years ago 1 reply

Hi all, We are using atmega128 for one of our project. I heard that it is a 8 bit microcontroller, ok its accumulator and its data bus are...

Hi all, We are using atmega128 for one of our project. I heard that it is a 8 bit microcontroller, ok its accumulator and its data bus are 8 bit width. Then what about is address bus, is it also 8 bit width? Because for this 8 bit it can address only up to 2^8 = 256 location. Then how it can address 4096 SRAM (4K) and 131072 Flash (128K). Can anybody clear me on this doubt? Thank you ...


Which ARM processor to use...

Started by Meindert Sprang in comp.arch.embedded11 years ago 25 replies

I am facing a redesign of an existing controller board. The original board is based on an AT91R40008-66 with an external flash of 256kB and an...

I am facing a redesign of an existing controller board. The original board is based on an AT91R40008-66 with an external flash of 256kB and an ethernet controller. I have no idea how long the R40008 will be around and with so many ARM controllers with built-in peripherals I am inclined to use a newer controller (might be an M3 core) with sufficent flash and SRAM on board and built-in ether...


More chip selects

Started by jtp in comp.arch.embedded18 years ago 1 reply

Hello all, I have a CPU board which has a M16C/62P microcontroller and the microcontrollers three CS pins are connected to SRAM, EEPROM and...

Hello all, I have a CPU board which has a M16C/62P microcontroller and the microcontrollers three CS pins are connected to SRAM, EEPROM and ADC. Now I need to add LCD to the CPU board throuch the latch and I will need one more CS pin to the latch. I am thinking to expand one of the microcontrollers CS pin to get two CS pins using address decoder in a way that this microcontrollers CS ...


Remote debugging via serial

Started by Nickolai Leschov in comp.arch.embedded15 years ago 7 replies

Hello, I am working on an industrial automation project that involves programming the i188 PC-compatible controller with embedded DOS and...

Hello, I am working on an industrial automation project that involves programming the i188 PC-compatible controller with embedded DOS and several serial ports. What options do I have for debugging on this hardware? Specifications of the controller: CPU 80188 or compatible, 40 MHz (RDC R-8820, clone of Am188ES ?) SRAM 512KBytes Flash 512KBytes EEPROM 2KBytes COM 0 Internal communica...


Question about the speed of SPI RAM

Started by Like2Learn in comp.arch.embedded12 years ago 15 replies

Hi there, We found we had to add an external RAM (SRAM or SDRAM) at the late stage of electrical design. Basically there are only 2 GPIO pins...

Hi there, We found we had to add an external RAM (SRAM or SDRAM) at the late stage of electrical design. Basically there are only 2 GPIO pins still available, otherwise the RAM has to share with other peripherals, such as SPI and I2C. I prefer to connect the external RAM with SPI bus. However, I am not sure if it is fast enough for RAM read/write. Does anybody know the typical speed of SPI...


Cheap 8-bit micro with external bus interface?

Started by Clive Wilson in comp.arch.embedded18 years ago 13 replies

Dear All, I'm looking for a cheap 8/16 bit uP/uC that has an external bus interface, so that about 256k of SRAM can be addressed. It needs to...

Dear All, I'm looking for a cheap 8/16 bit uP/uC that has an external bus interface, so that about 256k of SRAM can be addressed. It needs to have on-board Flash, around 32k would be good. The device doesn't need many GPIO pins, perhaps 5 or so just in case. It doesn't need ADC/DACs, USB etc like all the manfs seem to throw in them these days. It will be running a TCP/IP stack with li...


SoC from Microsemi - FPGA and ARM CM3

Started by rickman in comp.arch.embedded7 years ago 4 replies

I know Xilinx and Altera have their SoC devices which are a bit high end with dual A9 type ARMs. I recently found out the Microsemi SoC which...

I know Xilinx and Altera have their SoC devices which are a bit high end with dual A9 type ARMs. I recently found out the Microsemi SoC which uses a CM3 can be bought for just $16 and a KickStart board is available for just $59. I like it. The FPGA fabric is flash based rather than SRAM so you don't need to configure it each time it powers up. The CPU has up to 512 kB flash and 144...


Atmel EB42 automatic reset

Started by hikari in comp.arch.embedded18 years ago 2 replies

I just started developing programs on Atmel's AT91EB42 evaluation board using CrossStudio, which uses GNU toolchain. Two days ago I noticed that...

I just started developing programs on Atmel's AT91EB42 evaluation board using CrossStudio, which uses GNU toolchain. Two days ago I noticed that after my program was loaded into SRAM and started running, the board would reset itself after about 5 minutes. The program can be as simple as an infinite empty loop and the reset would still happen at roughly the same time. Initially, I thought it ...


Samsung S3C4510B Memory Remapping

Started by mantaray in comp.arch.embedded18 years ago 3 replies

Hello, I am writing the firmware for a custom board which uses the Samsung S3C4510B MCU. It board has 512KB of ROM and SRAM. I would like...

Hello, I am writing the firmware for a custom board which uses the Samsung S3C4510B MCU. It board has 512KB of ROM and SRAM. I would like to remap the memory into the following locations ROM at Bank0: 0x00000000 - 0x00080000 RAM at Bank1: 0x00100000 - 0x00180000 In my assembly program, I initialised the control register with the following instructions: ;Initialise SYSCFG register...


8051 memory interfacing questions

Started by andrew queisser in comp.arch.embedded19 years ago 9 replies

I'm trying to understand what my options are when it comes to interfacing memory to 8051. Am I correct that: - interfacing DRAM is complex...

I'm trying to understand what my options are when it comes to interfacing memory to 8051. Am I correct that: - interfacing DRAM is complex (for a beginner) - interfacing SRAM is more straightforward and is really the only practical memory type for fast, random access at the byte level (e.g. stack, heap) - interfacing FlashRAM is also straightforward but writing is more complex than just ...


Market size of new, non-legacy, 5V ICs ?

Started by Simon Clubley in comp.arch.embedded10 years ago 41 replies

Outside of the hobbyist ecosystem, what is the actual market size for new, non-legacy, ICs with a maximum Vcc of ~5V ? I've just picked up a...

Outside of the hobbyist ecosystem, what is the actual market size for new, non-legacy, ICs with a maximum Vcc of ~5V ? I've just picked up a few of the new Microchip 1Mbit SPI RAM ICs: http://uk.farnell.com/microchip/23lcv1024-i-p/sram-serial-1mbit-2-5-5-5v-8pdip/dp/2291921 and I was utterly amazed to see them available in this 5V capable packaging. This is a product range which until...


Problem with A/D

Started by Dado in comp.arch.embedded18 years ago 8 replies

Hello, I have problem with .C programming! (Working with Code Vision for AVR). I have set up one PCF8591 on I2C BUS. Can You help me with...

Hello, I have problem with .C programming! (Working with Code Vision for AVR). I have set up one PCF8591 on I2C BUS. Can You help me with code, where I m doing wrong? Chip type : ATmega8515 Program type : Application Clock frequency : 4,000000 MHz Memory model : Small External SRAM size : 0 Data Stack size : 128 Communication parameters: 9600 8N1 [RS232 SPARE header] [PORT...


Lowest power ARM

Started by ghazanhaider in comp.arch.embedded16 years ago 1 reply

I'm looking for the lowest power arm with an external bus and MMU. It should be able to run Linux, even if theres no readily available toolchain...

I'm looking for the lowest power arm with an external bus and MMU. It should be able to run Linux, even if theres no readily available toolchain for it. So It should be ARM720T or higher. The Atmel ARM9 parts are the only ones that support 1.8V external bus, where I can use low-power SRAM working on 1.8V. Every other ARM is 3.3V at their external bus, including the LPC2000 ones. I'll probab...


Low Dhrystone score on Tricore TC1796

Started by Anonymous in comp.arch.embedded16 years ago 11 replies

Hello, I am doing the Dhrystone benchmark on a TC1796A microcontroller from Infineon with different compilers (TASKING, Hightec-RT GNU GCC)....

Hello, I am doing the Dhrystone benchmark on a TC1796A microcontroller from Infineon with different compilers (TASKING, Hightec-RT GNU GCC). Both compilers are set to produce highest speed optimized code, still I only get about 15 DMIPs with GNU GCC and about 20 DMIPs with TASKING. CPU is running at 150MHz, 75MHz system clock, programs run from external SRAM; no difference (as it should be...


how to trace a microcontroller running it's app ?

Started by robb in comp.arch.embedded14 years ago 29 replies

I have a (8051) micro-controller that i would like to trace it's runtime program to understand how the program works for purpose of potentialy...

I have a (8051) micro-controller that i would like to trace it's runtime program to understand how the program works for purpose of potentialy modifying code. (The only info of program is the program binary copied off ROM ) The micro-controller consists of (usuall stuff): --------------------------------------- > Siemens 8031, ROM, SRAM > servo motors (+ driver ICs) > simple user 16 cha


Name this CPU

Started by aleksa in comp.arch.embedded15 years ago 5 replies

(in order of importance) * internal SRAM and FLASH ROM (protected from reading) * instruction set similar to x86, including: ...

(in order of importance) * internal SRAM and FLASH ROM (protected from reading) * instruction set similar to x86, including: instruction mnemonics, addressing modes, 8-16-32bit regs, read/write 8-16-32bit from/to internal/external memory, FPU * 32megs of addressable external memory * timers/counters, external IRQs, 32bits of memory-mapped I/O * pin-coun...