I need some idea to realize a structure like this: MCU LCD CONTROLLER TFT LCD I'm using a 32 bit MCU (ARM7 or Cortex-M3), supposed...

I need some idea to realize a structure like this: MCU LCD CONTROLLER TFT LCD I'm using a 32 bit MCU (ARM7 or Cortex-M3), supposed to drive external FLASH and SRAM. The TFT LCD has to be a QVGA-sized panel with no internal dedicated controller, has the company does not want to be be tied to a specific display model. We have this model to try with: http://www.data-modul.co

I'm looking for a way to read data from a PCMCIA PC SRAM card while it's in a device. This might sound extremely weird, but basically, the...

I'm looking for a way to read data from a PCMCIA PC SRAM card while it's in a device. This might sound extremely weird, but basically, the device writes data to the card, but we'd like to read it without using the device's protocol. Is there any way to do this ? Or can we replicate the writes to a different card that we can read ? Any help is appreciated ! Wim

Hi! Sorry if this is not the right group for the question but it seems to be the closest to the topic I could find. The problem is...

Hi! Sorry if this is not the right group for the question but it seems to be the closest to the topic I could find. The problem is this: I'm trying to implement a simple processor-based project on the NanoBoard using Altium Designer. I'm using TSK51 and external memory chip (128K SRAM) on the NanoBoard and my task is to connect them by writing a VHDL memory controller. I've created a...

Hi, I am working on a small design using Intel 386EXTC processor. The design has a 512KB Flash and a 512KB SRAM. The processor user manual says...

Hi, I am working on a small design using Intel 386EXTC processor. The design has a 512KB Flash and a 512KB SRAM. The processor user manual says "The chip-selects generated by this unit can simplify external "glue logic" by providing signals that can be connected directly to the chip-enable inputs of external memory and I/O devices." My question is if I am using 8bit memories, is it possi...

Hi, I've 3 questions about my Infineon TriCore microcontroller which is described by Infineon as "32-bit microcontroller-DSP...

Hi, I've 3 questions about my Infineon TriCore microcontroller which is described by Infineon as "32-bit microcontroller-DSP architecture optimized for real-time embedded systems". According to the manual, the DSP has the following memories: · Data Memory Unit (DMU) with ­ 64 Kbyte of Data Memory (SRAM) ­ 16 Kbyte of Stand-by Data Memory (SBRAM) · Program Memory Unit (PMU) ...

I require a development board with the folowing features: ARM7 or ARM9 chip. 2MB or higher NAND flash 2 MB or higher external SRAM (or...

I require a development board with the folowing features: ARM7 or ARM9 chip. 2MB or higher NAND flash 2 MB or higher external SRAM (or SDRAM) TFT LCD interface (and if possible an LCD module also) of 3.5 inch and higher phy dimensions, resolution 320(RGB) x 240, 16 bit color. onchip LCD controller (e.g. the ARM9 chips) will be preferred I am open to ICs of any make, (ATMEL, TI, NXP, et...

I am trying to drive a 320x240 LCD using an ARM microcontoller and some SRAM, all for an average of less than 1mA. I cant find an ARM7 MCU...

I am trying to drive a 320x240 LCD using an ARM microcontoller and some SRAM, all for an average of less than 1mA. I cant find an ARM7 MCU with a 320x240 driver (bw, 1-bitter STN, slow refresh). Where can I find an external LCD driver that can do all this for 40uA or lower? Or better is there an ARM7 mcu with a built in LCD driver to match this lcd? The MCU must have an external memory inte...

ISSCC 2005, 6-10 Feb 2005 ( http://ps2.unisord.com/ ) Presentations: -A Streaming Processing Unit for a CELL Processor (STI) -The Design...

ISSCC 2005, 6-10 Feb 2005 ( http://ps2.unisord.com/ ) Presentations: -A Streaming Processing Unit for a CELL Processor (STI) -The Design and Implementation of a First-Generation CELL Processor (STI) -A Double-Precision Multiplier with Fine-Grained Clock Gating Support for a First-Generation CELL Processor (IBM) -A 4.8GHz Fully Pipelined Embedded SRAM in the Streaming Processor of a CELL...

For my application purpose i used an external 128k Sram to M30845fjgp renesas m32c controller. I modified the linker file by defining the heap...

For my application purpose i used an external 128k Sram to M30845fjgp renesas m32c controller. I modified the linker file by defining the heap sizes in external addresses, but i was unable to have the heap segment. when iam placing data in ex-ram it was getting read, but the heap is not going to allocate even though the map file is locating the heap ranges. can u help me to get out of thi...

Newbie question : Suppose that the Atmel AVR internal flash memory is to small to store my new asm program into it, and suppose that you can't...

Newbie question : Suppose that the Atmel AVR internal flash memory is to small to store my new asm program into it, and suppose that you can't make your program smaller than what it is (graphics are in SRAM, did it all in ASM and so one. ps: this is a theoretically question). Is there a way to expand the program-flash memory of the AVR. I'm writing in ASM and I rather not want to use pseudo c...

Now availale from MPE is the C and Forth programmable ARM USB Stamp. 60MHz ARM, 128k Flash, 64k SRAM, USB, user programmable CPLD. ...

Now availale from MPE is the C and Forth programmable ARM USB Stamp. 60MHz ARM, 128k Flash, 64k SRAM, USB, user programmable CPLD. http://www.mpeltd.demon.co.uk/usbstamp.htm Also the TiniARM module http://www.mpeltd.demon.co.uk/tiniarm.htm Stephen -- Stephen Pelc, stephenXXX@INVALID.mpeltd.demon.co.uk MicroProcessor Engineering Ltd - More Real, Less Time 133 Hill Lane, Southampto...