[ANNOUNCE] CHSM: Statecharts implementation for C++ and Java

Started by Paul J. Lucas in comp.arch.embedded13 years ago 13 replies

CHSM (Concurrent Hierarchical State Machine) is a Statecharts implementation for C++ and Java that allows one to integrate state definitions,...

CHSM (Concurrent Hierarchical State Machine) is a Statecharts implementation for C++ and Java that allows one to integrate state definitions, event handlers, and transitions seamlessly into the host language's object model. CHSM allows normal Java or C++ code to be intermixed with the Statechart definition promoting a clear and natural programming paradigm. The CHSM is a full imple...


FPGA + Microcontroller - HELP

Started by LOC in comp.arch.embedded13 years ago 13 replies

Hi all, What is a device consisting of FPGA and microntroller suitable to following reqiurement: 1. my PCB board size is 2.5"x2.5" - small (so...

Hi all, What is a device consisting of FPGA and microntroller suitable to following reqiurement: 1. my PCB board size is 2.5"x2.5" - small (so I need a chip which has FPGA and Microcontroller ? ) 2. FPGA portion has minimum 28 JK FlipFlops, 28 shift registers, and the rest for IO and state machine, input clock 100 Mhz minimum. 3. microcontroller size has 2 serial ports, USB. Any advice wi...


Looking fro Flex , Yacc type tool suitable for embedded work.

Started by Anton Erasmus in comp.arch.embedded12 years ago 2 replies

Hi, I am looking for a parser generating tool that can generate C code suitable for small MCUs, such as an AVR. Preferably it should be...

Hi, I am looking for a parser generating tool that can generate C code suitable for small MCUs, such as an AVR. Preferably it should be able to generate code for a state machine type parser. Something like Anagram from Parsifal Soft would have been ideal, but unfortunately Jerome T. Holland of Parsifal soft died some time ago, and since then Anagram has been unavailable. (http://www.parsi...


Need a Design Tool to Do Large Data-Flow Diagrams and State Machine Logic ...?

Started by David T. Ashley in comp.arch.embedded12 years ago 4 replies

Hi, I'm reverse-engineering some embedded software that is best viewed as processes that communicate via shared variables. I'm looking for...

Hi, I'm reverse-engineering some embedded software that is best viewed as processes that communicate via shared variables. I'm looking for a design tool that will do large data-flow diagrams (like, plotter size), and will also capture state-machine logic. UML notation would be of interest, but not strictly necessary. Any recommendation or pros and cons? Thanks, Dave Ashley. ...


Suppressing "Parameter not used" Warning

Started by Dave Hansen in comp.arch.embedded12 years ago 40 replies

Please note crosspost. Often when writing code requiring function pointers, it is necessary to write functions that ignore their formal...

Please note crosspost. Often when writing code requiring function pointers, it is necessary to write functions that ignore their formal parameters. For example, a state machine function might take a status input, but a certain error-handling state might ignore it: typedef void (*State_Fn)(uint8_t); void error_state(uint8_t status) { NOT_USED(status); /* cod...


[Embedded] Software Design Capture Tool?

Started by David T. Ashley in comp.arch.embedded12 years ago 2 replies

Can anyone recommend tools to evaluate that capture important aspects of an embedded system design, such as state-machine logic, combinational...

Can anyone recommend tools to evaluate that capture important aspects of an embedded system design, such as state-machine logic, combinational logic, data flow diagrams, etc.? Ability to paste figures into Microsoft Word would be a plus. Large data flow diagrams would be a plus. Thanks and best regards, Dave Ashley.


Cypress FX2 bandwidth problem

Started by damir in comp.arch.embedded12 years ago 11 replies

We have developed data acquisition system which uses Cypress FX2 as the USB 2.0 interface. State machine for control and conversion of data...

We have developed data acquisition system which uses Cypress FX2 as the USB 2.0 interface. State machine for control and conversion of data between AD converters and FX2 is implemented using Xilinx Spartan 2 FPGA. The problem is that with higher data rates (up to 25 Mbit/s) we experience FX2 internal FIFO stalls and missing data on the receiving side. Small FIFO implemented inside FPGA d...


A state machine question

Started by Anonymous in comp.arch.embedded11 years ago 10 replies

I am implementing a state machine which has the following requirement: If the state machine is interrupted by power off, the state machine shall...

I am implementing a state machine which has the following requirement: If the state machine is interrupted by power off, the state machine shall resume from where it was interrupted after the program is restarted ( power on in this case). A basic idea is to keep a snapshot of the state machine before it is interrupted. I am seeking a better solution. please advice me. Thank you very m...


Software Design Capture Tools

Started by David T. Ashley in comp.arch.embedded11 years ago 10 replies

What is everyone using to capture software designs? I'm looking for data-flow diagrams, state machine charts, combinational logic tables,...

What is everyone using to capture software designs? I'm looking for data-flow diagrams, state machine charts, combinational logic tables, etc. I'd like to try out a few tools. Using LaTeX and a PostScript-capable graphics package is wearing me out. Any recommendations?


Lattice ISP interface

Started by David in comp.arch.embedded11 years ago 2 replies

Hi, I'm looking for some information on the proprietary ISP interface used by Lattice (specifically in the ispGDS22 device) I've managed to...

Hi, I'm looking for some information on the proprietary ISP interface used by Lattice (specifically in the ispGDS22 device) I've managed to find a Lattice document describing the function of the SDI,SDO,MODE + SCLK pins and the devices internal state machine, but nothing on specifically how to get the fuse map /JEDEC file into the device 'in-situ'. I've searched the Lattice website, but ...


optical debugger tools or some state machine deadlocks

Started by janka vietzen in comp.arch.embedded11 years ago 9 replies

last 2 days I was at a customers machine searching for bugs without any success. CPU ist a Freescale 6808 and code written in assembly (by me...

last 2 days I was at a customers machine searching for bugs without any success. CPU ist a Freescale 6808 and code written in assembly (by me about 5 years ago). The machine is now in production for about 1,5 years. In that time about 10 million pcs have been produced with. The upper unit consists of a turn table with 2 opposite mounted grabbers. The lower unit consists of a shuttle for fe...


Transition and reaction difference in FSM?

Started by Davy in comp.arch.embedded11 years ago 34 replies

Hi all, I found there are transition and reaction in FSM/HSM. I only know there is state transition in FSM. What's reaction mean? And what's...

Hi all, I found there are transition and reaction in FSM/HSM. I only know there is state transition in FSM. What's reaction mean? And what's there difference? BTW, I am studing Statecharts (or called Hierarchical State Machine, i.e. HSM). Is it useful in software/hardware design? Any suggestions are welcome! Best regards, Davy


Boolean Algebra / Karnaugh Maps with N > 2 (Higher Dimensions)

Started by David T. Ashley in comp.arch.embedded11 years ago 5 replies

Most who inhabit this list are probably familiar with standard Boolean algebra and Karnaugh maps,...

Most who inhabit this list are probably familiar with standard Boolean algebra and Karnaugh maps, i.e. http://en.wikipedia.org/wiki/Karnaugh Karnaugh maps come up very frequently in the design of microcontroller software, i.e. on a processor that handles bitfields very efficiently, one might even implement a 3-state state machine as something like: if (!x.bf1) { if (!x.bf0) ...


Crc16 on power failure

Started by maxt...@libero.it in comp.arch.embedded11 years ago 38 replies

Our machines have this requirement: if power failure occurs, many important variables are to be resumed from where they were interrupted after...

Our machines have this requirement: if power failure occurs, many important variables are to be resumed from where they were interrupted after the machine is restarted (power on in this case). In other words, the basic idea is to keep a snapshot of the state machine before it is interrupted. The board is provided with: - a 32-bit H8S/2633 Hitachi microprocessor; - a battery-backed memory (B...


Function Calls on ARM

Started by holysmoke in comp.arch.embedded11 years ago 4 replies

Hi All, I was wonder what are relative costs of a function call and a conditional statement? This is because I'm implementing a state machine...

Hi All, I was wonder what are relative costs of a function call and a conditional statement? This is because I'm implementing a state machine as: static media_callback media_cb [EVENT_MAX][STATE_MAX] = { {dummy, media_hide, media_hide, media_hide }, ... }; Should I call the callback like, with dummy function above media_cb[media_event][media_state](a,b,c,d,e,f); Or,...


To queue or not to queue

Started by Ivanna Pee in comp.arch.embedded10 years ago 3 replies

Hey group, I recently started a new job where the target is a handheld device with 3 buttons on it and a few other internal interrupts,...

Hey group, I recently started a new job where the target is a handheld device with 3 buttons on it and a few other internal interrupts, occurring maybe only every 125ms when it is in a real processing mode, with little processing to do to service the interrupts. The system runs on a low power controller and goes to low power mode whenever possible. It is implemented as a state machine, with...


TMS320F2812, RAM state after a RESET?

Started by Bubbah in comp.arch.embedded10 years ago 5 replies

Is it possible to save a variable in RAM and then make a watch dog reset and then read back the same value from the RAM? Or does the RAM...

Is it possible to save a variable in RAM and then make a watch dog reset and then read back the same value from the RAM? Or does the RAM get cleared? I need to save a state machine state before the reset and then restore the state after power up. I'm coding in C.


Open Source FSM and Message Passing Framework

Started by ratemonotonic in comp.arch.embedded10 years ago 1 reply

Hi all, I was just wondering if any one knows of any open source state machine and message passing framework for embedded applications. I have...

Hi all, I was just wondering if any one knows of any open source state machine and message passing framework for embedded applications. I have worked with good tools like Rhapsody and state flow and find the pattern to be very efficient for embedded systems. but these tools are extremely expensive , and I am looking for some cheaper or open source alternative for personal use. so far i ...


Uses of Gray code in digital design

Started by Anonymous in comp.arch.embedded10 years ago 56 replies

Hello, Most books on digital design discuss Gray codes. However, most of the focus is on generating these codes, rather than detailing their...

Hello, Most books on digital design discuss Gray codes. However, most of the focus is on generating these codes, rather than detailing their uses. I read the Wikipedia article: http://en.wikipedia.org/wiki/Gray_code, but it doesn't provide enough in-depth information of the uses of Gray code in hardware. I know Gray codes are used for: 1) Encoding state machine states. Why is it an ...