Cypress FX2 uc + Xilinx FPGA +windows system

Started by welber in comp.arch.embedded12 years ago 1 reply

Hi, I am new in FPGA and FX2 UC. I am looking for a good development board including xilinx FPGA and cyress Fx2 uc. I want to learn how to...

Hi, I am new in FPGA and FX2 UC. I am looking for a good development board including xilinx FPGA and cyress Fx2 uc. I want to learn how to program FPGA and FX2 uc. I went to several websites( usbp, Gnuradio, opal kelly, digilent...). They provide good development boards, but not all source codes open and no good tutorial written. Is any one know a good tutorial for Cypress FX2 uc + Xilinx F...


Xilinx Xact software for XC2018 Logic Cell Array

Started by rombios in comp.arch.embedded10 years ago 19 replies

I bought a few of these on ebay but I cant find Xilinx Xact software needed to design with these FPGAs Can someone point me in the right...

I bought a few of these on ebay but I cant find Xilinx Xact software needed to design with these FPGAs Can someone point me in the right direction? Anyone have a copy I can buy? sincerely hungry student


How to embed Time and Date in Xilinx FPGA?

Started by Anonymous in comp.arch.embedded12 years ago 2 replies

I would like to automatically embed the Xilinx compile (synthesize) time into my FPGA. I have a script file that can put the time and date into...

I would like to automatically embed the Xilinx compile (synthesize) time into my FPGA. I have a script file that can put the time and date into my Verilog code. I would like to automatically call that script file from the Xilinx ISE everytime i run the synthesizer. Is there anyway for the ISE to call an outside routine (other than running the whole thing from a command line without the IS...


Problem creating the ML403 project using Xilinx tool

Started by nareshgbhat in comp.arch.embedded12 years ago 1 reply

Hi Guys, I am new to Xilinx tools. I am facing some problem while creating the "Base system Builder project" for ML403 Rev B board. The...

Hi Guys, I am new to Xilinx tools. I am facing some problem while creating the "Base system Builder project" for ML403 Rev B board. The steps as follows: 1. I have downloaded the "ml403_emb_ref_ppc_81.zip" from Xilinx website. 2. I have used the tools EDK10.SP2 and ISE10.1SP4. Problem: When I am creating the base system builder project. I am able to see the UART_LITE, XPS_UARTLITE,...


Value of a Xilinx ML403 kit?

Started by larwe in comp.arch.embedded12 years ago 1 reply

I've just realized that the box causing one of my shelves to bow down in the middle is a complete Xilinx ML403 PowerPC+FPGA evaluation kit, with...

I've just realized that the box causing one of my shelves to bow down in the middle is a complete Xilinx ML403 PowerPC+FPGA evaluation kit, with the USB-JTAG adapter and all the other goodies that it originally included. It's vanishingly unlikely that I'll ever use it again. I guess I should list it on eBay; anyone have an idea what it's worth? Thanks.


USB Cable for Programming Xilinx FPGA (Spartan 3)

Started by Anand P. Paralkar in comp.arch.embedded5 years ago 6 replies

Hello everyone, I would like to know if we can use a general purpose (available off-the-shelf at popular stores) USB to JTAG cable to program...

Hello everyone, I would like to know if we can use a general purpose (available off-the-shelf at popular stores) USB to JTAG cable to program a Xilinx Spartan 3 FPGA or does it *have to be* a cable (and box) specifically meant for programming a Spartan 3 FPGA (as shown on the Xilinx website)? I am hoping to hear from people who have actually used a general purpose USB to JTAG cable (...


Looking for Xilinx HW-130/HW-120 Adapters

Started by Tim Regeant in comp.arch.embedded3 years ago 1 reply

Bump. Still looking for these adapters. Please contact me if you have any. Thanks. On 8/31/2016 12:10 AM, Tim Regeant wrote: > My...

Bump. Still looking for these adapters. Please contact me if you have any. Thanks. On 8/31/2016 12:10 AM, Tim Regeant wrote: > My project needs to program a Xilinx XC7336 44PLCC. > > I have the software now and the HW-130 programming unit. > > Also have the HW-137-PC44/VQ44 adapter which I assumed would work with > the XC7336, but as it turns out it does not. > > So I nee


Looking for basics and big picture

Started by Fizzy in comp.arch.embedded14 years ago 1 reply

Hi all, First please forgive me for my little knowledge about embedded system. I am trying to design an embedded application on a Xilinx FPGA...

Hi all, First please forgive me for my little knowledge about embedded system. I am trying to design an embedded application on a Xilinx FPGA Virtex-4 series. This has PPC405 core on it. Now i am trying to write an application as IP. Lets say a simple SPI cotroller. I know i have to interface this with PLB (Porcessor Local Bus) using IPIF module provided by Xilinx in EDK. What i am missing...


Xilinx Lwip

Started by Greg in comp.arch.embedded12 years ago 6 replies

I have been having issues using the Xilinx Lwip library. I checked out their example code for the web server and was unable to figure out where...

I have been having issues using the Xilinx Lwip library. I checked out their example code for the web server and was unable to figure out where they were getting the lwip_init function from. The compiler was telling me that the function couldn't be found. It would be great if someone had some sample code or if someone could just start by telling me what I need to include to get the lwip_in...


Question on Xilinx VirtexPro II FPGA chip... please

Started by Mark Levitski in comp.arch.embedded15 years ago 7 replies

I'd appreciate if someone could answer a few questions below: If you reply by email, REMOVE "SPAMNOMORE" in capital letters repeated in my...

I'd appreciate if someone could answer a few questions below: If you reply by email, REMOVE "SPAMNOMORE" in capital letters repeated in my address twice (edit address manually)!!! We ordered "Xilinx Virtex-Pro II" development kit, your answers will NOT change buying decisions - it?s already here, we need to know: 1. Is it possible to put either Linux or Nucleus RTOS into this chip memor...


EDK 10.1, timstamp and functions in Virtex4

Started by Anonymous in comp.arch.embedded11 years ago

Hi everyone, I'm pretty new in the FPGA and embedded area, and I'm working in an application using the Xilinx ML403 board, and the Xilinx...

Hi everyone, I'm pretty new in the FPGA and embedded area, and I'm working in an application using the Xilinx ML403 board, and the Xilinx tools ISE and EDK 10.1. I have some questions about that. -Is it possible to get the calendar time from the PPC? I need to generate a time stamp, and I was trying to use the standard c library . I'm using the standard approach like time_t no


Using USB on Xilinx ML-403

Started by NewToDrivers in comp.arch.embedded12 years ago

Hi all, I am somewhat new to embedded design and have a few questions. I'm want to be able to read/write to a USB thumbdrive from the Xilinx...

Hi all, I am somewhat new to embedded design and have a few questions. I'm want to be able to read/write to a USB thumbdrive from the Xilinx ML-403 board (with a Cypress CY7C67300 USB Chip). Will I need to write up the device driver for the ML-403 or is the protocol already on there. I guess the main thing I'm trying to figure out is the best way to begin to go about this problem. Any tak...


Emulating JTAG with micro for programming PROM

Started by Anonymous in comp.arch.embedded14 years ago 13 replies

First off I am new to JTAG emulation. I am required to program a Xilinx configuration PROM from a microcontroller. I realize that I...

First off I am new to JTAG emulation. I am required to program a Xilinx configuration PROM from a microcontroller. I realize that I can program the PROM with a cable from the parallel port but the product will require field upgrades. I've been sifting through docs from Xilinx and searching the web, and it seems like this should be easy and straight forward to implement. What I have learn...


Xilinx makefile

Started by Greg in comp.arch.embedded12 years ago

I have been having problems with using the power pc linker for stuff for my Xilinx board. When I use C++ it doesn't recognize virtual functions...

I have been having problems with using the power pc linker for stuff for my Xilinx board. When I use C++ it doesn't recognize virtual functions properly and says that it can not find the functions. This code has been tested and has worked since 2003 in my company so we are sure the code is not at fault. I also tested the code on Solaris and it worked just fine. In any event, I would lik...


Help finding Xilinx software for HW-130 programmer

Started by Tim Regeant in comp.arch.embedded4 years ago 2 replies

I am searching for some Xilinx programmer software for the HW-130 unit from around 1996-2000. Looking the the DOS version. The filename was...

I am searching for some Xilinx programmer software for the HW-130 unit from around 1996-2000. Looking the the DOS version. The filename was HW130.ZIP Also looking for the 16-bit windows version HW130W.ZIP. Thank you for any help you can offer!


Has anyone dealt with Avnet? or NuHorizons when trying to purchase Xilinx stuff

Started by Raban in comp.arch.embedded12 years ago 2 replies

Hello, I am new to this FPGA stuff and I wanted to purchase a starter kit and get volume pricing for a few Xilinx FPGA's If one where to...

Hello, I am new to this FPGA stuff and I wanted to purchase a starter kit and get volume pricing for a few Xilinx FPGA's If one where to buy through Avnet or maybe NuHorizons, would anyone like to share your past experiences when working with them? It seems all they care are who you are, what company you work with, what you exactly are you doing. In other words, how many parts are y...


'inbyte' was not declared in this scope

Started by Greg in comp.arch.embedded12 years ago 3 replies

Hello I am using the Xilinx Platform Studio to program a Xilinx FPGA and I am trying to use C++. When I switch the compiler form gcc to g++...

Hello I am using the Xilinx Platform Studio to program a Xilinx FPGA and I am trying to use C++. When I switch the compiler form gcc to g++ I immediately get an error telling me that mfs_filesys_util.c: In function 'int mfs_copy_stdin_to_file(char*)': mfs_filesys_util.c:146: error: 'inbyte' was not declared in this scope If anyone knows what the solution to this problem is I would be ...


Unable to query target part layout!!!

Started by xtmtd in comp.arch.embedded13 years ago

hi When I work with the xilinx edk(ver8.1), after buttoning down the ? download bitstream?, I want to make a bootloader from the ...

hi When I work with the xilinx edk(ver8.1), after buttoning down the ? download bitstream?, I want to make a bootloader from the external flash ,but a problem still baffles me all the time, when I pressed the ?program flash memory?, here is the context showed to me..------------- At Local date and time: Mon Aug 28 09:39:00 2006 xmd -tcl flashwriter.tcl started... Xilinx Microproce...


FPGA Development Board

Started by temujin in comp.arch.embedded13 years ago 17 replies

Dear Group, I=B4m new to FPGA, i.e. I=B4m about to start... Can anyone suggest a good development board for starters, or give me some...

Dear Group, I=B4m new to FPGA, i.e. I=B4m about to start... Can anyone suggest a good development board for starters, or give me some advice as to whether I should choose Xilinx or Altera... Is development on Altera / Xilinx much different from each other? Is it like PIC vs AVR vs Motorola??? best regards t=2E


interfacing a xilinx FPGA with a coldfire processor

Started by dargo in comp.arch.embedded11 years ago 1 reply

Hi, I'm looking for advice to implement on my FPGA (Xilinx SPARTAN 3A) a VHDL interface with an external COLDFIRE processor. Due to...

Hi, I'm looking for advice to implement on my FPGA (Xilinx SPARTAN 3A) a VHDL interface with an external COLDFIRE processor. Due to hardware considerations (not mine) I need to use 9 bits of address and 16 bits of datas, The following signals are available on my incoming pinout : TA, TEA, CS1, IRQ1 and R/W. Has anybody a clue where I can get some VHDL/Verilog code to help me? Thanks in adv...