ARM processor on FPGA

Started by "M. Jagan Mohan" in FPGA-CPU13 years ago 6 replies

Hi, I am working on a project which requires an ARM processor (hard core or softcore) to be put on a fpga. Basically the project targets on...

Hi, I am working on a project which requires an ARM processor (hard core or softcore) to be put on a fpga. Basically the project targets on Hardware-Software Integration to improve the performance of cryptographic algorithms. Some parts of the algorithm work on ARM processor and parts of the algorithm which are computationally intensive are built on FPGA for hardware acceleration. I ha...


MMIX on FPGA

Started by Michael_Dorfman in FPGA-CPU13 years ago 16 replies

(I tried to ask something similar a few days ago, but have yet to see it on the list-- please forgive me if this is a duplicate. I could be...

(I tried to ask something similar a few days ago, but have yet to see it on the list-- please forgive me if this is a duplicate. I could be misremembering, but I seem to recall somebody (perhaps Tommy Thorn?) saying that they knew of someone working on creating an FPGA version of Knuth's MMIX CPU. Does this ring a bell with anyone? Anyone know the status of this project, or how to g...


Small CPUs in FPGAs

Started by Rick Collins in FPGA-CPU13 years ago 100 replies

Hi, It looks like this group has been slumbering for a bit. This seems to be the ideal place to have my discussion, but I'm not sure if...

Hi, It looks like this group has been slumbering for a bit. This seems to be the ideal place to have my discussion, but I'm not sure if there will be anyone listening? I see that there are lots of members of this group, but not many postings. I am returning to my project to implement a small CPU in an FPGA. I had looked at some of Jan Gray's work back in 2002 or so. I don't see wh...


SD card interface using FPGA

Started by k7ar...@gmail.com in FPGA-CPU13 years ago 3 replies

hai all , i am arun . i am working on interfacing SD card using FPGA. i am using SPI mode of communication to SD card . 1. i wrote the code in...

hai all , i am arun . i am working on interfacing SD card using FPGA. i am using SPI mode of communication to SD card . 1. i wrote the code in verilog for the identification mode , i generated clock frequency of 100 khz to SD clk then i kept the SD card clock cycle to run for 74 cycles with CS high 2. after lowered the CS to 0 and gave the command 0 i.e 40_00_00_00_00_95 (hex) to the...


Unable to generate NIOS II

Started by syyang85 in FPGA-CPU13 years ago 1 reply

Hi all, I'm using Altera Quartus 2 6.1 and the board that I'm using is UP3 development board from Altera. I'm opening the example of Nios...

Hi all, I'm using Altera Quartus 2 6.1 and the board that I'm using is UP3 development board from Altera. I'm opening the example of Nios II system made by Altera. But i get the following error when I try to generate it. What error is this? On the other hand, what is the best way to save a stream of data into SDRAM? or would it be better if I made a soft memory for this purpose? Rega...


TO_UNSIGNED command in vhdl

Started by siva...@gmail.com in FPGA-CPU13 years ago 1 reply

hi, any one please tell me, the use of commands TO_UNSIGNED, TO_INTEGER,TO_SIGNED in vhdl language. To post a message, send it to:...

hi, any one please tell me, the use of commands TO_UNSIGNED, TO_INTEGER,TO_SIGNED in vhdl language. To post a message, send it to: f...@yahoogroups.com To unsubscribe, send a blank message to: f...@yahoogroups.com


DWT in vhdl

Started by siva...@gmail.com in FPGA-CPU13 years ago 3 replies

hi, how to implement discrete wavelet transform for image compression in vhdl.plz. give me brief idea. if anyone has source code please send...

hi, how to implement discrete wavelet transform for image compression in vhdl.plz. give me brief idea. if anyone has source code please send to me. thank you To post a message, send it to: f...@yahoogroups.com To unsubscribe, send a blank message to: f...@yahoogroups.com


Frame Grabber using FPGA thru webcam

Started by syyang85 in FPGA-CPU14 years ago 36 replies

Hello, I'm a student doing a project on implementing optical flow algorithm into FPGA. Basically, i would like to mount a camera ( preferably...

Hello, I'm a student doing a project on implementing optical flow algorithm into FPGA. Basically, i would like to mount a camera ( preferably webcam coz its cheap) onto a FPGA( my college currently has up2 and up3 @ltera education board) and it do some image/video processing in FPGA and display in an LCD or CRT monitor. As for my part, I'm doing the input part. That is getting the data...


Inferred Priority Encoder In VHDL

Started by rtstofer in FPGA-CPU14 years ago 12 replies

Consider something like: result

Consider something like: result


use C++ int__64 type variables in NIOS IDE

Started by paria354 in FPGA-CPU14 years ago 1 reply

does anyone know how to use C++ int__64 type variables when we want to implement it on NIOS IDE? coz IDE doesn't support upper than 32 bit...

does anyone know how to use C++ int__64 type variables when we want to implement it on NIOS IDE? coz IDE doesn't support upper than 32 bit integers.how can we use them in a big and intricate code. I mean that we can not devide all of the 64 bit variables into two 32 bit.coz the C++ code is very complex and it has lots of this type variables. To post a message, send it to: f...@yahoogro...


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