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doubt in configuration of cache in fpga

Started by ponnmozhi in FPGA-CPU20 years ago 4 replies

Hi, I am working on the spartanIIe FPGA and making use of the microblaze processor(EDK tool). My doubt is a very general one....

Hi, I am working on the spartanIIe FPGA and making use of the microblaze processor(EDK tool). My doubt is a very general one. basically the microblaze document says that cache in microblaze is implemented using Block RAM and on the other hand he also says that Block RAM can


BRAM utilisation for CACHE.

Started by ponnmozhi in FPGA-CPU20 years ago 1 reply

hi, I am back with my cache problem. [this is implementing a design using the microblaze using EDK tool (xilinx Platform...

hi, I am back with my cache problem. [this is implementing a design using the microblaze using EDK tool (xilinx Platform Studio]. Since there are fixed possible sizes of BRAM which can be assigned,like for spartanIIe 2,4,8 KB First I tried executing with cache disabled-


Xilinx vs Altera / Microblaze vs Nios???

Started by Mats Brorsson in FPGA-CPU19 years ago 14 replies

We are in the process of selecting an FPGA board for a series of laborations in courses ranging from computer engineering,...

We are in the process of selecting an FPGA board for a series of laborations in courses ranging from computer engineering, embedded software development to VHDL design, SoC architectures and operating systems. We are trying to evaluate Xilinx vs Altera boards


soft ip processors? history? advantages? vs ucontroller?

Started by umairsiddiqui0800 in FPGA-CPU19 years ago 2 replies

Sir, Soft IP Processors (my questions is from fpga prospective not from asic) have made strong hold in market, several...

Sir, Soft IP Processors (my questions is from fpga prospective not from asic) have made strong hold in market, several vendors like Xilinx(Picoblaze & Microblaze), @ltera(NIOS and NIOS-II) are making them. please do me a favor, I require some documents (articles


Microblaze In FPGA Virtex4 ML401?

Started by mora...@yahoo.com in FPGA-CPU17 years ago 13 replies

Good morning I have a project where I need to embed microcontroller in a Xilinx ML401.This project consist a GSM which connect to a...

Good morning I have a project where I need to embed microcontroller in a Xilinx ML401.This project consist a GSM which connect to a microcontroller(ATMEGA8535) and the microcontroller is eventually connected to Xilinx Virtex4 (ML401).It is actually road traffic light implementation for Emergency Vehicle Preemption System. My friend told me that I could do this by implementing a Microbl...



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