XSOC and XS-50 or BurchEd B5-X300

Started by rtstofer in FPGA-CPU15 years ago

It would appear that the XS-40 board is history and being replaced by the XS-50. Does anyone know if Jan Gray's XSOC...

It would appear that the XS-40 board is history and being replaced by the XS-50. Does anyone know if Jan Gray's XSOC project will port to the XS-50 with the limited abilities of a novice? I would really like to port it to the SpartanII3 using the BurchEd B5-


XSOC2.0

Started by guptaseen in FPGA-CPU12 years ago 1 reply

Hi all i am new member here and was looking to learn and understand xr16 and xsoc. i am unable to find XSOC2.0 code and documents. all i was...

Hi all i am new member here and was looking to learn and understand xr16 and xsoc. i am unable to find XSOC2.0 code and documents. all i was able to get was xsoc beta 0.93. is there any possibility to amke xr16 wishbone compliant? this list seems to be very quiet. not sure why. no activity in last 7 days!!! To post a message, send it to: f...@yahoogroups.com To unsubscribe, send a bl...


Xsoc 16bit RISC

Started by shibashish patel in FPGA-CPU14 years ago 3 replies

We were looking at the XSOC 16 bit RISC by Jan Gray. What is the role of the vga and can you explain its functioning. Can you explain...

We were looking at the XSOC 16 bit RISC by Jan Gray. What is the role of the vga and can you explain its functioning. Can you explain the test-bench written for the same. Yahoo! India Mobile: Ringtones, Wallpapers, Picture Messages and more.Download now.


xsoc schematics in ISE WebPack

Started by ts_oswald in FPGA-CPU14 years ago

Hi - I'm somewhat new to the fpga world and have been using the Xilinx ISE WebPack version 6.2.03i with a Digilent D2FT...

Hi - I'm somewhat new to the fpga world and have been using the Xilinx ISE WebPack version 6.2.03i with a Digilent D2FT board (Spartan XC2S300E). To explore implementing a cpu on an fpga, I've downloaded the XSOC Project Version Beta 0.93 and wanted to load into


small CPUs

Started by Jan Gray in FPGA-CPU14 years ago 3 replies

> The XSOC RISC is also not very small. That stings! Oh well -- de gustibus non disputandem est -- so what's new in small...

> The XSOC RISC is also not very small. That stings! Oh well -- de gustibus non disputandem est -- so what's new in small processor cores? Anyone care to fill in the table below with more recent entries? Small (IMHO): PicoBlaze: 76-96 slices (approx. double to


free ip cores including a 16 bit cpu using the LCC 'C' / XSOC compiler

Started by Lee_Hotmail in FPGA-CPU14 years ago

ExpressIP Ltd would like to introduce their FPGA board (and free programmer) to the fpga-cpu news group. The boards uses a...

ExpressIP Ltd would like to introduce their FPGA board (and free programmer) to the fpga-cpu news group. The boards uses a Xilinx FPGA and has support devices to support a cpu based design. Also with the board ExpressIP gives away FREE IP CORES and example applications that run on