UART TX FIFO and INTs problem

Started by forum_microbit in LPC200015 years ago 43 replies

Hi all, [I'm reposting on the URL, the new lpc2000 address doesn't seem to wor I'm a bit stuck with this one, and hope...

Hi all, [I'm reposting on the URL, the new lpc2000 address doesn't seem to wor I'm a bit stuck with this one, and hope someone has some advice, I must be overlooking something and I just don't see it....... I'm using Two 256 byte circular buffers for RX and TX In


UART1 and FIFO Reset (ISSUE)

Started by genie_23432 in LPC200013 years ago

Hello, After much fustration I appear to have solved most of my stability issues (although not all of them). I seem to have an...

Hello, After much fustration I appear to have solved most of my stability issues (although not all of them). I seem to have an undocumented issue with UART1 on the LPC2119 and was wondering if anyone else ran into the same problem. At the very least I figure I would warn people about the potential issue since I couldn't find it in the current er


uart tx overrun

Started by shwouchk in LPC200010 years ago 2 replies

Hi, I am writing code for handling uart right now, and I became concerned with the size of the Tx fifo and of overrunning it. I thought...

Hi, I am writing code for handling uart right now, and I became concerned with the size of the Tx fifo and of overrunning it. I thought about using the scratch register to count how many chars were sent and each time it gets to 16 to wait for a THRE interrupt to clear it. I think this method would be highly inefficient in terms of uart transmission rates. What would you recommend for ...


SPI Performance

Started by James Dabbs in LPC200014 years ago 8 replies

Do any of the LPC ARM's have faster SPI ports (like maybe with a FIFO), or are they all basically the same as LPC210X? I...

Do any of the LPC ARM's have faster SPI ports (like maybe with a FIFO), or are they all basically the same as LPC210X? I thought I saw mention here that one of them had a slightly faster SPI implementation, but I can't find any such part now.


ADC DOUBT

Started by omprakash alone in LPC20008 years ago

Hi, I am using sine wave from generator as a ADC(10-bit) i/p without using interrupt. The sampled value what i am getting after ADC...

Hi, I am using sine wave from generator as a ADC(10-bit) i/p without using interrupt. The sampled value what i am getting after ADC conversion is too high. After that I want to perform operations on that values. Here is sampled code, where the sampled value will copied into the *INIT VARIABLE BY USING FIFO. ? while(1) do{ ?value= AD1DR0;//NEW_DATA[k++]=value; ?}while((value & 0x80...


Re: To recieve block of data

Started by Sreedevi in LPC200011 years ago 2 replies

=A0 Hai I am using LPC2129 processor.Can anyone help me in recieving a block of dat= a from RBR or FIFO registers...Currently i am using the...

=A0 Hai I am using LPC2129 processor.Can anyone help me in recieving a block of dat= a from RBR or FIFO registers...Currently i am using the getchar function wh= ich will get only last one character .... What all inclusions have to be done in the code to recieve a block of data = at a time entered in the hyperterminal.... =20 =20


Deeper Detials on ADC LPC2114 2124 LPC2138

Started by phlpcmicro in LPC200014 years ago 3 replies

Hi All, I am looking for block diagrams and operation and suggested usage detials on the LPC ADCs? Both the UM and DS...

Hi All, I am looking for block diagrams and operation and suggested usage detials on the LPC ADCs? Both the UM and DS are a little light on for detials. What is the ADC input impedance? How does the FIFO operate. Question I


Re: SSP FIFO

Started by shilpi_dhoot17 in LPC200010 years ago

hi, i tried your code but the S0SPDR shows 0xff even after assigning=20 S0SPDR =3D 0x0055; in debug mode any idea why? Please...

hi, i tried your code but the S0SPDR shows 0xff even after assigning=20 S0SPDR =3D 0x0055; in debug mode any idea why? Please suggest. thanks --- In l...@yahoogroups.com, "philips_apps" =20 wrote: > > Hello Malcom, > =20 > Here are elements of your SPI0 code that are not lined up with this=20 > peripheral's spec published in the LPC214x User Manual: > =20 > 1)S0SPC


Re: defecting to luminary?

Started by Mark Butcher in LPC200011 years ago

Hi Ed > Have you measured/seen any limitations with the luminary ethernet, or is > this more of a thought experiment? While the 2kB FIFO...

Hi Ed > Have you measured/seen any limitations with the luminary ethernet, or is > this more of a thought experiment? While the 2kB FIFO seems a bit small > (and might present an overrun risk, as you mentioned), I couldn't quite > convince myself that the actual throughput would measurably worse than > with an LPC style DMA engine. I think I agree that it would be a bit > worse (hypo


Re: To recieve block of data

Started by Sreedevi in LPC200011 years ago 1 reply

=A0 > What is 'a block of data'? The physical trasport only transfers > bytes. Depending on your config and link timing, your code could >...

=A0 > What is 'a block of data'? The physical trasport only transfers > bytes. Depending on your config and link timing, your code could > encounter the FIFO with anything between 1 and 16 bytes in it. > > If you want any structure more complex than a byte stream, you need a > protocol that defines your 'block'. > > Rgds, > Martin First of all i thanku for giving me a reply,now we can co


SPI Throughput

Started by Charly in LPC200012 years ago 4 replies

Hi all, how do we improve the SPI0 and SPI1 throughput (with one FIFO slot) I find that the bottleneck actually is the while-loop of...

Hi all, how do we improve the SPI0 and SPI1 throughput (with one FIFO slot) I find that the bottleneck actually is the while-loop of checking the Busy flag. i set the SPI1 clock to be 15MHz, verified. the duration to execute the following function takes about 2.8uSec. this gives throughput of 2.8Mbps.. U8 SPI_write() { while(waiting for txfifo to be not full); SPI1_DR = byte;...


Basic UART and RS422 implementation

Started by my_c...@... in LPC200013 years ago 2 replies

I\'m somewhat new to the ARM and lower-level programming, so I have some (rather) basic questions about the UART on the LPC 2214 and then some...

I\'m somewhat new to the ARM and lower-level programming, so I have some (rather) basic questions about the UART on the LPC 2214 and then some on our implementation of half-duplex RS-422. First off, the user manual says that the 2214 has a 16-byte-deep Tx FIFO. Does this mean that when I want to transmit, I could just write myself a loop routine to read bytes out of my Tx buffer


Strange GCC compiler assembler output

Started by Jan Thogersen in LPC200012 years ago 13 replies

Hi, Now I'm trying to dig into the assembler generation from the GCC compiler and I've noticed something that I don't quite...

Hi, Now I'm trying to dig into the assembler generation from the GCC compiler and I've noticed something that I don't quite understand. Here is the dump that got my attention: if (buf_inpos == buf_outpos) T0MR0++; else { // The fifo is empty E59F3130 ldr r3, [pc, #304] E5D33000 ldrb r3, [r3] E51B101C ldr r1, [r11, #-28] E1530001 cmp r3, r1 ...


Re: ADC Interface

Started by samiehg in LPC200011 years ago

Thanks Richard. I am actually using CSTART to do the conversions but use CS to select the ADC I want to talk to. The problem I am facing...

Thanks Richard. I am actually using CSTART to do the conversions but use CS to select the ADC I want to talk to. The problem I am facing is that I want to use the sweep mode, and have configured it generate INT after the fifo is 1 level deep. So after I have sent the arm period, I would expect the INT to go low AFTER I have generated TWO CSTART pulses. In my case I see the INT going low...


LPC2148 Uart Problem

Started by SUBRAMANIUM in LPC20007 years ago 1 reply

Hello am using LPC2148 controller. I have started to use WinArm complier now. Previously I was using Keil compiler. Now I am able to print data...

Hello am using LPC2148 controller. I have started to use WinArm complier now. Previously I was using Keil compiler. Now I am able to print data using both uart0 n uart1 but am not able to receive the data from either ports. my initialization routine is below. Kindly help. thanks in advance. /** * Initialize UART0, setup pin select, clock, parity, stop bits, FIFO, etc. * * @param baudrate...


SPI on LPC3180

Started by Sam Lee in LPC200012 years ago

Hi I was working on the LPC3180 and i am currently trying out the 2 SPI ports. getting one to receive and the other to transmit to each...

Hi I was working on the LPC3180 and i am currently trying out the 2 SPI ports. getting one to receive and the other to transmit to each other. I understand that there is a FIFO buffer for both the transmit and receive. The problem that i have is that when i try to send a few sets of data (less than 8) before receiving on the other SPI port, what i receive is just the value that i last tra...


SPI howto

Started by lpcarmed in LPC200013 years ago 1 reply

There was a lot of discussion about SPI recently, it would be great if we could summarize how to use it right. For starters this is what I...

There was a lot of discussion about SPI recently, it would be great if we could summarize how to use it right. For starters this is what I collected: - SPI master could not use the select line. SSEL needs to be pulled up in master mode. If master needs to use select line use a regular GPIO and drive if from the code. - There is no FIFO


Crossworks, C++, SPI, FIQ

Started by mjames_doveridge in LPC200010 years ago 6 replies

mornin' all.. A design change has left me with a requirement to use an SD card with the SPI interface on my LPC2129. This interface has no...

mornin' all.. A design change has left me with a requirement to use an SD card with the SPI interface on my LPC2129. This interface has no FIFO buffer and a high transfer rate, (well, can be, anyway). To implement the interface, I need to read/write 512-byte sectors. I have a couple of problems. All my comms IRQ interrupts have no nesting. I have only one buffer supply queue into all...


Uart FIFOs being disabled

Started by peterburdine in LPC200014 years ago 3 replies

Has anyone had experience with their UART fifos being randomly disabled? For some reason, my UART0 fifo is being diabled...

Has anyone had experience with their UART fifos being randomly disabled? For some reason, my UART0 fifo is being diabled seemingly randomly. The application itself is not that complex, it receives a 2 byte command and sends back 10 bytes of status. Somehow, the fifos get disab


The weirdest of things..... Interrupts and port toggling.

Started by adrianunderwater in LPC200010 years ago 2 replies

Hi, I initially posted this problem under the heading: "lpc2138 uart1 drops interrupts" however I have ascertained that the UART1 is not...

Hi, I initially posted this problem under the heading: "lpc2138 uart1 drops interrupts" however I have ascertained that the UART1 is not missing any interrupt... But I am still stumped by my problem. In a nutshell, in the interrupt routine for uart1 transmit fifo empty, I have the following snippet of code. cmp W4,#0 ; No more characters to send, bne int_uart1_thre2 ...