Reply by Tim Wescott November 7, 20082008-11-07
On Thu, 06 Nov 2008 07:53:08 -0600, isnithin wrote:

> Hi, > I am building QPSK demodulator on FPGA. I am basically performing > demodulation with the help of Costas loop. > > My QPSK Digital Demodulator should have following features: > > 1)It should adhere with DVB-S, DVB-S2 Standard. 2)It should perform > carrier phase recovery and clock recovery. > > > I have the following querries: > > 1)Costas loop need Sine/Cosine table for multiplication with the > incoming modulated samples. On what factors does this table depend on? > > 2)How can I decide on Samples/Symbol. According to my understanding > samples/symbol=(Bit-rate)/(Sampling frequency of the ADC) > Note: ADC is the one which converts (receives) analog modulated data and > converts it into digital. > Is my understanding correct?? > > 3)What will be the Carrier Frequency for DVB-S2 System? > > 4)For the carrier phase recovery using Costas loop, after calculating > the phase difference, How can I apply this "phase error" for next > iteration? Should I update the Sine/Cosien tables? how can I control it? > > 5) how can I decide on the parameters for Low pass filter and Loop > Filter used in the Costas Loop. > > Regards, > Nithin
Homework? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" gives you just what it says. See details at http://www.wescottdesign.com/actfes/actfes.html
Reply by isnithin November 6, 20082008-11-06
Hi,
   I am building QPSK demodulator on FPGA. I am basically performing
demodulation with the help of Costas loop. 

My QPSK Digital Demodulator should have following features:

1)It should adhere with DVB-S, DVB-S2 Standard.
2)It should perform carrier phase recovery and clock recovery.


I have the following querries:

1)Costas loop need Sine/Cosine table for multiplication with the incoming
modulated samples. On what factors does this table depend on? 

2)How can I decide on Samples/Symbol.
According to my understanding samples/symbol=(Bit-rate)/(Sampling
frequency of the ADC)
Note: ADC is the one which converts (receives) analog modulated data and
converts it into digital. 
Is my understanding correct??

3)What will be the Carrier Frequency for DVB-S2 System?

4)For the carrier phase recovery using Costas loop, after calculating the
phase difference, How can I apply this "phase error" for next iteration?
Should I update the Sine/Cosien tables? how can I control it?

5) how can I decide on the parameters for Low pass filter and Loop Filter
used in the Costas Loop.

Regards,
Nithin