Reply by Nial Stewart January 19, 20092009-01-19
>I am using MPC5200 processor and ADC chip ADS7927. These are connected with > SPI interface with frequency of 16MHz. the track length is large that is > around 10cm.
It's not the clock speed but the edge rate that matters, if it's a fast falling or rising edge there's a chance there's enough ringing to double clock the ADC. Even if the scope 'fixes' the problem you should see a lot of ringing on the line if this is the case. Nial
Reply by Didi January 15, 20092009-01-15
On Jan 15, 6:26=A0pm, "mahesh.himane" <mahesh.him...@tcs.com> wrote:
> I am using MPC5200 processor and ADC chip ADS7927. These are connected wi=
th
> SPI interface with frequency of 16MHz. the track length is large that is > around 10cm. I am facing the basic problem some thing about the loading. > When I am connecting probe to the SCK line on the ADC then I am getting > correct result from ADC, whereas if I remove DSO probe from SCK line then > junk data is readed from ADC. > =A0This is definatly the loading problem. please provide the solution how=
to
> solve the problem. Should adding pullup on the SCK line will help? Or > should I use some other termination method?
As the others suggest, this may well be an initialization error. 10 cm is not that long at 16 MHz, with the 5200 you will have ground planes so you are likely using the wrong clock polarity. I have had a DAC and an ADC run at 16 MHz with the 5200 (separate PSCs) at somewhat less than 10 cm trace length (perhaps 5), but there was plenty of margin. You can see the board with the DAC and ADC at http://tgi-sci.com/y2demo/ . Dimiter ------------------------------------------------------ Dimiter Popoff Transgalactic Instruments http://www.tgi-sci.com ------------------------------------------------------ http://www.flickr.com/photos/didi_tgi/sets/72157600228621276/
Reply by John Devereux January 15, 20092009-01-15
"MK" <nospam@please.thanks> writes:

> "mahesh.himane" <mahesh.himane@tcs.com> wrote in message > news:UpedncbQj9Yv_vLUnZ2dnUVZ_q3inZ2d@giganews.com... >>I am using MPC5200 processor and ADC chip ADS7927. These are connected with >> SPI interface with frequency of 16MHz. the track length is large that is >> around 10cm. I am facing the basic problem some thing about the loading. >> When I am connecting probe to the SCK line on the ADC then I am getting >> correct result from ADC, whereas if I remove DSO probe from SCK line then >> junk data is readed from ADC. >> This is definatly the loading problem. please provide the solution how to >> solve the problem. Should adding pullup on the SCK line will help? Or >> should I use some other termination method? >> >> > > Don't be so sure that this is a loading/termination problem. I have seen SPI > with the phase settings wrong but still working if loaded with scope or > capacitor.
I agree, I have seen *exactly* this effect too, when the phase is wrong.
> If you are sure that the settings are correct then use your scope to tell > you what is wrong with the signals (you might need to make yourself a low > capacity probe with a couple of surface mount resistors). You'll know when > you have got the probe right - it won't make the ADC work any more and when > you connect a second probe on the SAME signal it won't change (much). > Once you know what is wrong with your signals you might be able to fix them. > (Or if it's a one off and you are in a hurry just look up the scope probe > capacitance in the manual and add a little capacitor to earth (and don't > tell anyone I suggested it)) > > Michael Kellett > >
-- John Devereux
Reply by Tim Wescott January 15, 20092009-01-15
On Thu, 15 Jan 2009 10:26:26 -0600, mahesh.himane wrote:

> I am using MPC5200 processor and ADC chip ADS7927. These are connected > with SPI interface with frequency of 16MHz. the track length is large > that is around 10cm. I am facing the basic problem some thing about the > loading. When I am connecting probe to the SCK line on the ADC then I am > getting correct result from ADC, whereas if I remove DSO probe from SCK > line then junk data is readed from ADC. > This is definatly the loading problem. please provide the solution how > to > solve the problem. Should adding pullup on the SCK line will help? Or > should I use some other termination method?
The key word is "termination". 10cm is a bit short to be causing trouble with reflections unless the line is really ringing, but clearly you have something going on. Just for giggles, check to see if Freescale had the foresight to slope- limit the output pins (they may call this "current drive level adjust"). This is being done more and more these days (I know for sure that Xilinx and Luminary Micro do it, and I'd be astonished if Altera didn't). You may actually be able to fix a hardware problem _correctly_ in software, for once. The "really right" way to do this (barring slope limiting in the micro) is to (a) route the line over ground plane the whole way from the processor to the ADC, and (b) terminate the line, either with a series resistor at the processor or with some sort of shunt network at the ADC. _Normally_ you'd use somewhere between a 30 and 100 ohm series resistor at the processor, or somewhere between a 100 and 250 ohm shunt to ground at the ADC, and _normally_ the shunt to ground at the ADC would be capacitively coupled so that it only loads the clock line while it is active. You _may_ be able to fix this with a shunt termination of 1k-ohm or so just about anywhere in the line, the closer to the ADC the better. Were I to try this trick I would find the value that just barely works then use half that (and use a series cap if I was going to really burn up a lot of power in the termination). (If I had designed the board in the first place I'd also try to move out of town without leaving a forwarding address...) -- Tim Wescott Control systems and communications consulting http://www.wescottdesign.com Need to learn how to apply control theory in your embedded system? "Applied Control Theory for Embedded Systems" by Tim Wescott Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
Reply by MK January 15, 20092009-01-15
"mahesh.himane" <mahesh.himane@tcs.com> wrote in message 
news:UpedncbQj9Yv_vLUnZ2dnUVZ_q3inZ2d@giganews.com...
>I am using MPC5200 processor and ADC chip ADS7927. These are connected with > SPI interface with frequency of 16MHz. the track length is large that is > around 10cm. I am facing the basic problem some thing about the loading. > When I am connecting probe to the SCK line on the ADC then I am getting > correct result from ADC, whereas if I remove DSO probe from SCK line then > junk data is readed from ADC. > This is definatly the loading problem. please provide the solution how to > solve the problem. Should adding pullup on the SCK line will help? Or > should I use some other termination method? > >
Don't be so sure that this is a loading/termination problem. I have seen SPI with the phase settings wrong but still working if loaded with scope or capacitor. If you are sure that the settings are correct then use your scope to tell you what is wrong with the signals (you might need to make yourself a low capacity probe with a couple of surface mount resistors). You'll know when you have got the probe right - it won't make the ADC work any more and when you connect a second probe on the SAME signal it won't change (much). Once you know what is wrong with your signals you might be able to fix them. (Or if it's a one off and you are in a hurry just look up the scope probe capacitance in the manual and add a little capacitor to earth (and don't tell anyone I suggested it)) Michael Kellett
Reply by mahesh.himane January 15, 20092009-01-15
I am using MPC5200 processor and ADC chip ADS7927. These are connected with
SPI interface with frequency of 16MHz. the track length is large that is
around 10cm. I am facing the basic problem some thing about the loading.
When I am connecting probe to the SCK line on the ADC then I am getting
correct result from ADC, whereas if I remove DSO probe from SCK line then
junk data is readed from ADC.
 This is definatly the loading problem. please provide the solution how to
solve the problem. Should adding pullup on the SCK line will help? Or
should I use some other termination method?