Thank you for the offer, but I do have that schematic. The things
that I noticed about it is that it has a filter capacitor on the DVcc
and AVcc lines, and that it actually connects the XOUT pin to the JTAG
port.
I have added a capacitor to mine (100nF ceramic), put have not put a
lead on XOUT, because I read elsewhere on USENET That this pin is no
longer necessary.
-Chess
> Hi,
>
> TI have a demo board based on the msp430f149, you can check all the
> connections against that.
>
> I'm not sure it's schematic is on the web, but i could dig it out for you if
> your having problems finding it.
>
> Dave
>
> "Chess Saurus" <chessaurus@yahoo.com> wrote in message
> news:e722c26f.0407191557.57bd1583@posting.google.com...
> > I know that I've seen a TI document about this before, but a 15 minute
> > google search left me with nothing.
> >
> > I am double-checking a schematic that uses an MSP430F149, and I want
> > to ensure that I have all the pins correctly terminated for (1)
> > correct operations and (2) access to the JTAG port for in-circuit
> > programming and debugging. Here's what I've got:
> >
> > AVcc -- 3.3V
> > DVcc -- 3.3V
> > DVss -- GND
> > AVss -- GND
> > XIN -- GND
> > VeRef+ -- GND
> > VeRef- -- GND
> > RST -- Pulled up to 3.3V, with a connector at pin
> > TCK -- Connector at pin
> > TMS -- Connector at pin
> > TDI -- Connector at pin
> > TDO -- Connector at pin
> >
> > Everything else is open (except for some inputs and outputs that I am
> > using). I am using the internal oscillator as clock.
> >
> > Any help (whether a reference to a document or a check of my pinout)
> > will be greatly appreciated.
> >
> > -Chess
Reply by Mike Page●July 21, 20042004-07-21
Chess Saurus wrote:
> I know that I've seen a TI document about this before, but a 15 minute
> google search left me with nothing.
>
> I am double-checking a schematic that uses an MSP430F149, and I want
> to ensure that I have all the pins correctly terminated for (1)
> correct operations and (2) access to the JTAG port for in-circuit
> programming and debugging. Here's what I've got:
>
> AVcc -- 3.3V
> DVcc -- 3.3V
> DVss -- GND
> AVss -- GND
> XIN -- GND
> VeRef+ -- GND
> VeRef- -- GND
> RST -- Pulled up to 3.3V, with a connector at pin
> TCK -- Connector at pin
> TMS -- Connector at pin
> TDI -- Connector at pin
> TDO -- Connector at pin
>
> Everything else is open (except for some inputs and outputs that I am
> using). I am using the internal oscillator as clock.
>
> Any help (whether a reference to a document or a check of my pinout)
> will be greatly appreciated.
>
> -Chess
Not sure about tying RST high. TI's demo schems always use an RC reset
in the range 10K-100K (though I think 30K is the "upper limit" according
to other documentation) + 100n, and this works in the lab. The MSP's
hardware brownout does leave a hole however, so I would recommend an
external reset chip as best practice.
You can leave VeRef+ floating. I'd be tempted to do the same with XIN,
it might be biassed.
Most of the demo files have a ASCII schematic in a big comment at the top.
Regards,
Mike.
--
Mike Page BEng(Hons) MIEE www.eclectic-web.co.uk
Quiet! Tony's battling the forces of conservatism, whoever we are.
Reply by David Powell●July 20, 20042004-07-20
Hi,
TI have a demo board based on the msp430f149, you can check all the
connections against that.
I'm not sure it's schematic is on the web, but i could dig it out for you if
your having problems finding it.
Dave
"Chess Saurus" <chessaurus@yahoo.com> wrote in message
news:e722c26f.0407191557.57bd1583@posting.google.com...
> I know that I've seen a TI document about this before, but a 15 minute
> google search left me with nothing.
>
> I am double-checking a schematic that uses an MSP430F149, and I want
> to ensure that I have all the pins correctly terminated for (1)
> correct operations and (2) access to the JTAG port for in-circuit
> programming and debugging. Here's what I've got:
>
> AVcc -- 3.3V
> DVcc -- 3.3V
> DVss -- GND
> AVss -- GND
> XIN -- GND
> VeRef+ -- GND
> VeRef- -- GND
> RST -- Pulled up to 3.3V, with a connector at pin
> TCK -- Connector at pin
> TMS -- Connector at pin
> TDI -- Connector at pin
> TDO -- Connector at pin
>
> Everything else is open (except for some inputs and outputs that I am
> using). I am using the internal oscillator as clock.
>
> Any help (whether a reference to a document or a check of my pinout)
> will be greatly appreciated.
>
> -Chess
Reply by Chess Saurus●July 19, 20042004-07-19
I know that I've seen a TI document about this before, but a 15 minute
google search left me with nothing.
I am double-checking a schematic that uses an MSP430F149, and I want
to ensure that I have all the pins correctly terminated for (1)
correct operations and (2) access to the JTAG port for in-circuit
programming and debugging. Here's what I've got:
AVcc -- 3.3V
DVcc -- 3.3V
DVss -- GND
AVss -- GND
XIN -- GND
VeRef+ -- GND
VeRef- -- GND
RST -- Pulled up to 3.3V, with a connector at pin
TCK -- Connector at pin
TMS -- Connector at pin
TDI -- Connector at pin
TDO -- Connector at pin
Everything else is open (except for some inputs and outputs that I am
using). I am using the internal oscillator as clock.
Any help (whether a reference to a document or a check of my pinout)
will be greatly appreciated.
-Chess