Reply by Mark L. Cukier June 20, 20052005-06-20
Hello:

Please ensure that the "sych to PLL frequency change" checkbox is
checked (this is in the debugger options dialog). If you're still having
problems, feel free to e-mail me off-list so that I can get some more
details from you (possibly a source code snippet) so we can get you up
and running!

Regards,
Mark
P&E

shcaoyh wrote:

> I use the P&E USB HCS08/HCS12 Multilink as the development tool,
>the target is the 80 pins MC9S12D64. This board is a simple circuit,
>I
>use a 16MHz quartz crystal with the Colpitts configuration. With the
>REFDV=1 and the SYNR=2, the CPU bus frequence is 24MHz. The PLL
>initialization application have a delay before switch the system
>clock
>to the PLLCLK, but when I switch the clock source with the USB
>HCS08/HCS12 Multilink the program runs away. And after down load the
>program to the target, turn on the power or reset the target without
>the USB HCS08/HCS12 Multilink the PLL works well.
> What is the problem, can anybody help me? >
>Yahoo! Groups Links >
>


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____________________________
*Mark L. Cukier*, /Design Engineer/
P&E Microcomputer Systems
656 Beacon Street, Floor 2
Boston, MA 02215
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Reply by shcaoyh June 20, 20052005-06-20

I use the P&E USB HCS08/HCS12 Multilink as the development tool,
the target is the 80 pins MC9S12D64. This board is a simple circuit,
I
use a 16MHz quartz crystal with the Colpitts configuration. With the
REFDV=1 and the SYNR=2, the CPU bus frequence is 24MHz. The PLL
initialization application have a delay before switch the system
clock
to the PLLCLK, but when I switch the clock source with the USB
HCS08/HCS12 Multilink the program runs away. And after down load the
program to the target, turn on the power or reset the target without
the USB HCS08/HCS12 Multilink the PLL works well.
What is the problem, can anybody help me?