Reply by Vladimir Vassilevsky●December 16, 20092009-12-16
Tim Wescott wrote:
> On Wed, 16 Dec 2009 12:02:05 -0600, Vladimir Vassilevsky wrote:
>
>
>>Thomas Magma wrote:
>>
>>
>>>I'm trying to figure out if I can run the dsPIC33 at the maximum 40MIPS
>>>and use the PWM output to clock an external ADC without introducing the
>>>phase noise(into the ADC) associated with the internal clock PLL. Is
>>>there a way to have the dsPIC processor use the clock PLL but have the
>>>PWM circuitry directly referenced to the external clock?
>>
>>FWIW not very long ago I had to wrestle with the phase noise of the
>>signals generated by BlackFin DSP. You won't find any phase noise specs
>>on MCU generated signals, as those noises are strongly correlated with
>>the activities of MCU. You can expect jitter ballpark ~50..100pS. It
>>doesn't matter much if you are using or not using internal PLL. So, if
>>that kind of jitter is important for your application, you have to
>>reclock the MCU generated signal into external latch, or use completely
>>different clock chain.
>
>
> Apparently the mechanism on this stems from internal noise affecting the
> thresholds of the gates -- so even (as you say) with a perfectly stable
> clock you'll still see phase noise.
There is significant coupling inside the chip; crap flies by stray
capacitances and supply rails. Nobody can tell for sure how big are
those effects.
> I hadn't thought of resampling the output -- I'll have to remember that.
The most fancy solution I thought of was negative feedback of jitter
from MCU output to MCU incoming clock. Jitter can be measured against
clean external clock; so the whole thing is a sort of PLL.
VLV
Reply by Tim Wescott●December 16, 20092009-12-16
On Wed, 16 Dec 2009 12:02:05 -0600, Vladimir Vassilevsky wrote:
> Thomas Magma wrote:
>
>> I'm trying to figure out if I can run the dsPIC33 at the maximum 40MIPS
>> and use the PWM output to clock an external ADC without introducing the
>> phase noise(into the ADC) associated with the internal clock PLL. Is
>> there a way to have the dsPIC processor use the clock PLL but have the
>> PWM circuitry directly referenced to the external clock?
>
> FWIW not very long ago I had to wrestle with the phase noise of the
> signals generated by BlackFin DSP. You won't find any phase noise specs
> on MCU generated signals, as those noises are strongly correlated with
> the activities of MCU. You can expect jitter ballpark ~50..100pS. It
> doesn't matter much if you are using or not using internal PLL. So, if
> that kind of jitter is important for your application, you have to
> reclock the MCU generated signal into external latch, or use completely
> different clock chain.
Apparently the mechanism on this stems from internal noise affecting the
thresholds of the gates -- so even (as you say) with a perfectly stable
clock you'll still see phase noise.
I hadn't thought of resampling the output -- I'll have to remember that.
--
www.wescottdesign.com
Reply by Vladimir Vassilevsky●December 16, 20092009-12-16
Thomas Magma wrote:
> I'm trying to figure out if I can run the dsPIC33 at the maximum 40MIPS and
> use the PWM output to clock an external ADC without introducing the phase
> noise(into the ADC) associated with the internal clock PLL. Is there a way
> to have the dsPIC processor use the clock PLL but have the PWM circuitry
> directly referenced to the external clock?
FWIW not very long ago I had to wrestle with the phase noise of the
signals generated by BlackFin DSP. You won't find any phase noise specs
on MCU generated signals, as those noises are strongly correlated with
the activities of MCU. You can expect jitter ballpark ~50..100pS. It
doesn't matter much if you are using or not using internal PLL.
So, if that kind of jitter is important for your application, you have
to reclock the MCU generated signal into external latch, or use
completely different clock chain.
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com
Reply by Thomas Magma●December 16, 20092009-12-16
I'm trying to figure out if I can run the dsPIC33 at the maximum 40MIPS and
use the PWM output to clock an external ADC without introducing the phase
noise(into the ADC) associated with the internal clock PLL. Is there a way
to have the dsPIC processor use the clock PLL but have the PWM circuitry
directly referenced to the external clock?
Thomas