Reply by James Snyder March 28, 20112011-03-28
On Mar 26, 9:33=A0am, rickman <gnu...@gmail.com> wrote:
> On Mar 25, 2:52=A0pm, James Snyder <jbsny...@gmail.com> wrote: > > > > > > > > > > > On Mar 20, 8:40=A0am, David Brown <david.br...@removethis.hesbynett.no> > > wrote: > > > > On 20/03/11 06:06, rickman wrote: > > > > OpenOCD and the various JTAG adapters. =A0But a given adapter can w=
ork
> > > > with multiple targets. =A0At the JTAG point it is just a way to get > > > > commands into the target. =A0What level of this hierarchy has to > > > > understand the debugging protocol of the target? =A0I guess it woul=
d be
> > > > OpenOCD, yes? =A0Where is this documented? =A0In particular, for th=
e
> > > > Kinetis devices could that be figured out from the OSJTAG code? =A0=
Or
> > > > does that just dumbly handle JTAG commands like the FTDI device? =
=A0If
> > > > not there, where would this info be available from? > > > > I don't know whether the OSJTAG does any work itself, or passes thing=
s
> > > on directly. =A0But either way, one would hope there is enough > > > documentation available to allow OpenOCD to speak to the OSJTAG - if > > > not, then reverse engineering based on the source code for OSJTAG is > > > certainly possible. > > > The source for the OSJTAG device that's on the Kinetis boards is made > > available by P&E Micro, so you can actually check what it's doing (and > > alter it, if it weren't passing things through as cleanly as one > > desired). =A0If you grab the "Design Documents" link from the link > > below, you'll have the source both for the libusb drivers and for the > > OSJTAG/OSBDM JM60 firmware that runs on the embedded debugger:http://ww=
w.pemicro.com/osbdm/index.cfm
> > Yes, I have the source. =A0It just occurred to me, what is required to > compile the source? =A0Do you need the Freescale tools or are there open > source tools for that? =A0Likely I will be looking at using different > hardware anyway, so this may not be an important issue.
I'm not actually sure. It looks like SDCC supports the 68HC08, so that may work? http://sdcc.sourceforge.net/ The debugger chip on the K60 tower board is an MC9S08JM60, so regardless presumably one needs a working compiler for this in order to create a new firmware.
> > > I've been experimenting with the API provided by P&E and so far I've > > had trouble with the abstracted functions that aren't just providing > > fairly direct JTAG access (as far as I can tell, the commands for > > halting and resetting are silently failing (returns OK status), but > > reading from memory on the Kinetis gives me an error... not sure if > > I'm missing something). =A0They provide an alternate command structure > > through a "special function" interface, look at > > "jtag_kinetis.c:t_special_feature" which appears to be a more direct > > JTAG interface, which as far as I can tell is what most of the > > existing working IDEs and programming tools are using to flash and > > program the device. =A0Unfortunately I'm not that familiar with the > > internals of ARM's JTAG implementation, but I suspect maybe this > > interface could be somehow mated up with OpenOCD, or in the worst case > > the firmware on the debugger chip could be altered as desired to > > provide the interface needed and that could be used in stead. > > I assume you are doing all this by reverse engineering the code rather > than finding any docs?
Yep, pretty much. There are no docs on this and I'm not sure if they'll be publishing anything to indicate how their interface works besides the minimal comments that exist.
> > > > > Maybe I should say that I am trying to figure out how someone might > > > > add debugging support to a tool. =A0I think OpenOCD would be used, =
so I
> > > > guess we just need to make OSJTAG work with OpenOCD which would be =
a
> > > > win/win. > > > Originally I was hoping that I might be able to put together a simple > > flashing interface for this device that wouldn't need a full JTAG > > implementation behind it, but what I've been finding, I think that > > OpenOCD may be a better bet for communicating with this device and > > getting both debugging and flashing functionality working. > > Does OpenOCD communicate with the Kinetis devices? =A0I thought not. =A0O=
r
> by "device" do you mean the OSJTAG chip?
I'm not sure that OpenOCD has been updated to be aware of the Kinetis devices, but I suspect this isn't an overly complicated process. I was meaning that in terms of getting mileage out of the OSJTAG chip with open source tools patching/updating OpenOCD is probably the quickest/easiest path to getting something useful where one could debug/flash a Kinetis over the OSJTAG using open tools. I suspect that it wouldn't be too hard to get OpenOCD to work with it using an existing supported interface and an appropriate adapter cable to the 0.05" Samtec Cortex Debug connector that exists onboard.
> > > > Yes, that's about right. > > > > Of course, there is another possible route. =A0The Kinetis developmen=
t
> > > cards have a standard ARM jtag port, as far as I can see, in addition=
to
> > > the OSJTAG USB device. =A0So you can use any other Cortex-compatible > > > debugger with them - ranging from powerful "intelligent" devices like > > > the ZY1000 to cheap (or even home-made) FTDI-based devices. =A0So whi=
le I
> > > hope that OSJTAG support will make its way into OpenOCD sometime (and=
if
> > > Freescale are on the ball, they will contribute to that work > > > themselves), you can always get around it with some cheap and simple > > > hardware. > > I have longer term goals in mind. =A0In addition to working with the > Kinetis devices, I want to learn as much as practical about the > debugging hardware and software so that I can provide support for > other devices.
Fair enough. This situation has certainly piqued my interest in knowing a bit about the details of the JTAG implementation. :-)
> > Rick
Reply by rickman March 26, 20112011-03-26
On Mar 25, 2:52=A0pm, James Snyder <jbsny...@gmail.com> wrote:
> On Mar 20, 8:40=A0am, David Brown <david.br...@removethis.hesbynett.no> > wrote: > > > On 20/03/11 06:06, rickman wrote: > > > OpenOCD and the various JTAG adapters. =A0But a given adapter can wor=
k
> > > with multiple targets. =A0At the JTAG point it is just a way to get > > > commands into the target. =A0What level of this hierarchy has to > > > understand the debugging protocol of the target? =A0I guess it would =
be
> > > OpenOCD, yes? =A0Where is this documented? =A0In particular, for the > > > Kinetis devices could that be figured out from the OSJTAG code? =A0Or > > > does that just dumbly handle JTAG commands like the FTDI device? =A0I=
f
> > > not there, where would this info be available from? > > > I don't know whether the OSJTAG does any work itself, or passes things > > on directly. =A0But either way, one would hope there is enough > > documentation available to allow OpenOCD to speak to the OSJTAG - if > > not, then reverse engineering based on the source code for OSJTAG is > > certainly possible. > > The source for the OSJTAG device that's on the Kinetis boards is made > available by P&E Micro, so you can actually check what it's doing (and > alter it, if it weren't passing things through as cleanly as one > desired). =A0If you grab the "Design Documents" link from the link > below, you'll have the source both for the libusb drivers and for the > OSJTAG/OSBDM JM60 firmware that runs on the embedded debugger:http://www.=
pemicro.com/osbdm/index.cfm Yes, I have the source. It just occurred to me, what is required to compile the source? Do you need the Freescale tools or are there open source tools for that? Likely I will be looking at using different hardware anyway, so this may not be an important issue.
> I've been experimenting with the API provided by P&E and so far I've > had trouble with the abstracted functions that aren't just providing > fairly direct JTAG access (as far as I can tell, the commands for > halting and resetting are silently failing (returns OK status), but > reading from memory on the Kinetis gives me an error... not sure if > I'm missing something). =A0They provide an alternate command structure > through a "special function" interface, look at > "jtag_kinetis.c:t_special_feature" which appears to be a more direct > JTAG interface, which as far as I can tell is what most of the > existing working IDEs and programming tools are using to flash and > program the device. =A0Unfortunately I'm not that familiar with the > internals of ARM's JTAG implementation, but I suspect maybe this > interface could be somehow mated up with OpenOCD, or in the worst case > the firmware on the debugger chip could be altered as desired to > provide the interface needed and that could be used in stead.
I assume you are doing all this by reverse engineering the code rather than finding any docs?
> > > Maybe I should say that I am trying to figure out how someone might > > > add debugging support to a tool. =A0I think OpenOCD would be used, so=
I
> > > guess we just need to make OSJTAG work with OpenOCD which would be a > > > win/win. > > Originally I was hoping that I might be able to put together a simple > flashing interface for this device that wouldn't need a full JTAG > implementation behind it, but what I've been finding, I think that > OpenOCD may be a better bet for communicating with this device and > getting both debugging and flashing functionality working.
Does OpenOCD communicate with the Kinetis devices? I thought not. Or by "device" do you mean the OSJTAG chip?
> > Yes, that's about right. > > > Of course, there is another possible route. =A0The Kinetis development > > cards have a standard ARM jtag port, as far as I can see, in addition t=
o
> > the OSJTAG USB device. =A0So you can use any other Cortex-compatible > > debugger with them - ranging from powerful "intelligent" devices like > > the ZY1000 to cheap (or even home-made) FTDI-based devices. =A0So while=
I
> > hope that OSJTAG support will make its way into OpenOCD sometime (and i=
f
> > Freescale are on the ball, they will contribute to that work > > themselves), you can always get around it with some cheap and simple > > hardware.
I have longer term goals in mind. In addition to working with the Kinetis devices, I want to learn as much as practical about the debugging hardware and software so that I can provide support for other devices. Rick
Reply by James Snyder March 25, 20112011-03-25
On Mar 20, 8:40=A0am, David Brown <david.br...@removethis.hesbynett.no>
wrote:
> On 20/03/11 06:06, rickman wrote: > > > On Mar 19, 6:21 pm, David Brown<david.br...@removethis.hesbynett.no> > > wrote: > >> On 19/03/11 22:25, Simon Clubley wrote: > > >>> On 2011-03-19, Simon Clubley<clubley@remove_me.eisner.decus.org-Earth=
.UFP> =A0 wrote:
> > >>>> The JTAG adapter and driver are implemented within (and only within) > >>>> OpenOCD. > > >>> That statement (with it's implied lack of _direct_ JTAG support withi=
n gdb
> >>> itself) is stronger than I can justify with my level of experience, s=
o let
> >>> me clarify: some parts of GDB may have direct support for specific JT=
AG
> >>> devices (even though I have not yet come across this support if it ex=
ists),
> >>> but when OpenOCD is been used to connect to a device, then all JTAG > >>> specific driver/adapter support which is actually used to talk to the > >>> device is within OpenOCD itself. > > >>> Simon. > > >> Let me expand a little on that with some history of embedded gdb > >> debugging before OpenOCD (and for non-ARM targets). =A0You probably kn=
ow
> >> much of this already, but perhaps by putting it in slightly different > >> words it will help Rick (and maybe others) understand better. =A0I hop=
e I
> >> don't make /too/ many mistakes and confuse things further. > > >> gdb is a program built with three "ends" - a front-end, a middle-end, > >> and a back-end. =A0The mainline version comes with several front-ends, > >> several middle-ends, and several back-ends. =A0There are also specific > >> ports or patched versions with additional variants of these ends. =A0O=
n
> >> top of this, it can be compiled for different hosts (for example, > >> running on Windows or Linux) and for different targets (x86, ARM, etc.=
).
> > >> This makes it a very flexible program. =A0For some uses, it is > >> self-sufficient. =A0For other uses, it forms part of a chain of progra=
ms -
> >> which may even include more than gdb. > > >> At the front-end, you have the connection from the higher level world =
to
> >> gdb. =A0This can be using gdb's built-in command-line interpreter (for > >> those that like a fast and efficient interface at the cost of a > >> significant learning curve). =A0There is also a graphics interface, > >> Insight, that is often built into the gdb binary. =A0Or it can also > >> receive commands in a more concise format via a pipe, serial port or a > >> tcp/ip socket - this is how other front-ends like ddd, Eclipse, > >> CodeBlocks, etc., use gdb as their back-end debugger. =A0The front-end=
,
> >> along with the protocols used, are largely independent of the target, > >> the language, and the back-end (though when using the CLI there will b=
e
> >> some specific commands). > > >> The middle-end supports the language and the target architecture. =A0g=
db
> >> supports C, C++, Ada, and various other languages. =A0And it supports =
a
> >> huge range of targets. =A0It is the middle-end that handles loading fi=
les,
> >> understanding debug symbols, registers, reading and writing memory, et=
c.
> > >> The back-end also has a number of options. =A0It can connect to a nati=
ve
> >> process on suitable OS'es (such as for natively debugging programs > >> running on Linux or Windows). =A0It can also connect using a serial po=
rt,
> >> pipe, or a tcp/ip socket and communicate with a lower-level debugger > >> using the gdb debugging protocol. =A0This protocol is mostly, but not > >> entirely, independent of the target architecture. =A0It is also someti=
mes
> >> build with target simulator backends. > > >> Mainline gdb by itself can therefore not debug embedded systems. =A0It > >> knows nothing about jtag, BDM, or any other way of connecting to an > >> embedded system. =A0The most common way to handle this is to have a pr=
oxy
> >> program that knows about the low-level interface, and which communicat=
es
> >> with gdb over a tcp/ip socket. > > >> It used to be common practice to make patched versions of gdb that > >> directly support debugger interfaces. =A0For example, I have a gdb bui=
ld
> >> that communicate with a MC68332 using a parallel interface BDM debugge=
r.
> >> =A0 =A0Such patched monolithic builds made sense before, for speed rea=
sons -
> >> now host systems are so fast that it makes more sense to use > >> development-friendly modular arrangements with separate proxies. > > >> Sometimes these proxies run directly on the target. =A0This is often t=
he
> >> case for debugging embedded Linux systems - here the "proxy" may in fa=
ct
> >> be a limited version of gdb running on the target. =A0But mostly the > >> proxies run on the host, and communicate with a debugging interface of > >> some kind. > > >> For example, with the CodeSourcery gcc toolchain for the ARM, you get > >> some programs they call "debug sprites". =A0These are specific to the > >> particular debugger interface, and let you use the same gdb for any > >> supported debugger. =A0gdb talks to the sprite, and the sprite talks t=
o
> >> the hardware (via USB, typically). =A0The USB debugger interface then > >> talks to the jtag interface on the target processor. > > >> Sometimes these proxy programs are not open source. =A0For example, TI=
has
> >> not released information about jtag debugging for the msp430. =A0But i=
t
> >> was willing to release it under an NDA to some msp-gcc developers. =A0=
So
> >> they wrote the a proxy, released as binary only to protect the NDA > >> information, allowing GPL'ed gdb to talk to the msp430 processors. > > >> And sometimes the proxy is neither on the host or the target, but is o=
n
> >> an "intelligent" debugger unit, such as the ZY1000 debugger which > >> connects to the host by Ethernet. =A0(The ZY1000 runs OpenOCD.). > > >> So where does OpenOCD fit into this picture? =A0OpenOCD is a debugger > >> proxy program (it does other things as well). =A0It is designed to be =
very
> >> flexible - it supports a wide range of debugger interfaces, scripting, > >> almost all types of ARM (and a few other targets such as some MIPS > >> devices), flash programming, board support, etc. =A0The idea is to hav=
e
> >> one common proxy program that suits most uses - at least in the ARM > >> world - rather than having lots of different proxy programs. > > >> OpenOCD therefore "knows" about JTAG and a range of debugger interface=
s.
> >> =A0 =A0Many of these interfaces are very simple - it is common to use =
the
> >> FTDI2232 chips for JTAG interfaces, which blindly pass data between th=
e
> >> USB and the JTAG connection. =A0Others are more complex and have more > >> advanced protocols. > > >> As well as acting as a gdb proxy, OpenOCD supports scripting and an > >> interface designed to control programming flash or other setup on > >> devices, or to handle other jtag tasks such as board testing. > > > David, thank you for an excellent explanation. =A0This makes it all muc=
h
> > more clear now. =A0It would seem to me that if the source code for the > > JTAG adapter on the Freescale eval boards (OSJTAG) is available as > > open source, then the interfaces on either side would need to be open > > even if not documented. =A0So it should not be a large job to make any > > of the open source tools compatible with it. > > That's possibly correct - but remember that "open source" doesn't > necessarily mean "documented", "well-written" or "understandable". =A0Man=
y
> developers who publish their source are proud of their work, and want > people to view their code and think it is well written, and also want to > write code that other people can work with an contribute to. =A0But that > doesn't apply to all open source code, especially if it has been written > as an internal project and then later released without due care and > planning. =A0I have no idea what the situation is for Freescale's code > here - I am just saying that even if the code is available, it does not > mean the OpenOCD developers can trivially support the interface. > > > So I guess the only thing I am still not clear on is exactly what the > > protocol levels are on the target side. =A0It seems clear that there is > > a protocol between GDB and OpenOCD. =A0There are many protocols between > > Yes, that is GBD's protocol. =A0It is documented in the gdb documentation=
,
> if you are interested in the details: > > <http://sourceware.org/gdb/current/onlinedocs/gdb/> > <http://sourceware.org/gdb/current/onlinedocs/gdb/Remote-Protocol.html...= > > > > OpenOCD and the various JTAG adapters. =A0But a given adapter can work > > with multiple targets. =A0At the JTAG point it is just a way to get > > commands into the target. =A0What level of this hierarchy has to > > understand the debugging protocol of the target? =A0I guess it would be > > OpenOCD, yes? =A0Where is this documented? =A0In particular, for the > > Yes, it is OpenOCD that handles this - though possibly in cooperation > with "intelligent" debugger hardware interfaces. =A0For simple interfaces > such as the FTDI-based devices, OpenOCD handles all the translation > between gdb protocol telegrams (such as "read 4 bytes from address > 0x1234") into the required jtag telegrams for the particular target. > > > Kinetis devices could that be figured out from the OSJTAG code? =A0Or > > does that just dumbly handle JTAG commands like the FTDI device? =A0If > > not there, where would this info be available from? > > I don't know whether the OSJTAG does any work itself, or passes things > on directly. =A0But either way, one would hope there is enough > documentation available to allow OpenOCD to speak to the OSJTAG - if > not, then reverse engineering based on the source code for OSJTAG is > certainly possible.
The source for the OSJTAG device that's on the Kinetis boards is made available by P&E Micro, so you can actually check what it's doing (and alter it, if it weren't passing things through as cleanly as one desired). If you grab the "Design Documents" link from the link below, you'll have the source both for the libusb drivers and for the OSJTAG/OSBDM JM60 firmware that runs on the embedded debugger: http://www.pemicro.com/osbdm/index.cfm I've been experimenting with the API provided by P&E and so far I've had trouble with the abstracted functions that aren't just providing fairly direct JTAG access (as far as I can tell, the commands for halting and resetting are silently failing (returns OK status), but reading from memory on the Kinetis gives me an error... not sure if I'm missing something). They provide an alternate command structure through a "special function" interface, look at "jtag_kinetis.c:t_special_feature" which appears to be a more direct JTAG interface, which as far as I can tell is what most of the existing working IDEs and programming tools are using to flash and program the device. Unfortunately I'm not that familiar with the internals of ARM's JTAG implementation, but I suspect maybe this interface could be somehow mated up with OpenOCD, or in the worst case the firmware on the debugger chip could be altered as desired to provide the interface needed and that could be used in stead.
> > Maybe I should say that I am trying to figure out how someone might > > add debugging support to a tool. =A0I think OpenOCD would be used, so I > > guess we just need to make OSJTAG work with OpenOCD which would be a > > win/win.
Originally I was hoping that I might be able to put together a simple flashing interface for this device that wouldn't need a full JTAG implementation behind it, but what I've been finding, I think that OpenOCD may be a better bet for communicating with this device and getting both debugging and flashing functionality working.
> > Yes, that's about right. > > Of course, there is another possible route. =A0The Kinetis development > cards have a standard ARM jtag port, as far as I can see, in addition to > the OSJTAG USB device. =A0So you can use any other Cortex-compatible > debugger with them - ranging from powerful "intelligent" devices like > the ZY1000 to cheap (or even home-made) FTDI-based devices. =A0So while I > hope that OSJTAG support will make its way into OpenOCD sometime (and if > Freescale are on the ball, they will contribute to that work > themselves), you can always get around it with some cheap and simple > hardware.
Reply by rickman March 23, 20112011-03-23
On Mar 22, 12:16=A0pm, David Brown <da...@westcontrol.removethisbit.com>
wrote:
> On 22/03/2011 14:35, rickman wrote: > > > > > On Mar 22, 4:05 am, David Brown<da...@westcontrol.removethisbit.com> > > wrote: > >> On 21/03/2011 17:28, rickman wrote: > > >> OK. =A0Your viewpoint is as an FPGA expert moving more into > >> microcontroller fields, while mine is from long experience with > >> microcontrollers and only dabbling in FPGA design. > > > I guess that is one way to put it. =A0Certainly my experience with FPGA=
s
> > is a lot deeper than with MCUs. =A0I have lots of experience with MCUs > > and DSPs, but I've never really popped open the hood on the tools > > having always used vendor supplied tools. =A0I have literally no > > experience with the gnu tools other than that I host the gnuarm.com > > site. =A0But even that is languishing since the guy who used to do the > > builds has decided that yagarto is a better way to go and abandoned > > the gnuarm effort. =A0:( =A0Someday I need to learn how to build and us=
e
> > the tools so I can update gnuarm.com. > > Of course, you could just agree with him and point gnuarm.com users to > yagarto :-) =A0But building gcc toolchains is fun, if you have the time. > > > > > > >>> I expect the debugging capability in the FPGA would be the same sort > >>> of basic functionality any debug hardware would include; a means of > >>> single stepping at the machine instruction level, breakpoint at an > >>> address for instruction fetch or data read/write, read/write memory > >>> and registers, perhaps even a trace buffer. =A0If the JTAG interface =
is
> >>> fully defined for some simple processor I am sure duplicating that > >>> functionality would not be at all hard. =A0The closer I can get to th=
e
> >>> functionality of a currently supported processor, the fewer changes t=
o
> >>> the software I will need. > > >> I don't know what processor core you are thinking of on the FPGA, but > >> using a pre-built one with a ready-made debug interface will save you =
a
> >> lot of effort (assuming, of course, that such cores will do what you > >> need). =A0If you are already planning on using Cortex M4 devices, then=
the
> >> obvious choice for an FPGA core would be a Cortex M1. =A0But you proba=
bly
> >> already know more about these than I do. > > > I plan to gain experience with the Cortex devices. =A0I have worked wit=
h
> > the Luminary Micro parts, but I think the Kinetis line has longer > > legs. =A0Or at least they seem like they are going into the CM3/4 area > > with guns ablaze! =A0But my real passion at the moment (even if not > > financially fruitful) is home grown CPUs in FPGAs. =A0There are some > > interesting approaches to CPUs when done in FPGAs that can take > > advantage of a simple architecture as well as various optimizations > > available in FPGAs to produce small and fast processors. =A0I rolled my > > own once and used it in a design, but never had decent tool support. > > You might be interested to look at the ZPU at > <http://opensource.zylin.com/zpu.htm>. =A0This is an open source cpu core > for FPGAs, with full gcc toolchain support. =A0I am not sure whether the > project is still very active (though it is certainly not completely > dead) - but it might at least give you some ideas. =A0The main developer > is coincidentally also very active as an OpenOCD developer, though as > far as I know there is no OpenOCD (or even JTAG) support for the ZPU. > > > Right now the only thing between me and a good solution seems to be > > connecting to available debug tools through JTAG and adding a new > > processor to the tool. =A0Someone I know has done this for some of the > > CM3 devices and I am trying to help him with the CM4 Kinetis parts. > > Once that goal is reached I figure I'll have enough insight to adapt > > the process to my FPGA processors. > > > I'm not looking to find a shortest path method adding a CPU to an > > FPGA. =A0Those tend to be proprietary and large. =A0I am looking for op=
en
> > source all the way to give me enough control that I can optimize for > > my needs.
I am very aware of the ZPU and the project is very active. At least the mailing list is very active. That is one of my thoughts, to add JTAG support for the ZPU and other open source FPGA CPUs. But the ZPU itself is not of great interest to me. The goal of the ZPU is not the same as my own. Rick
Reply by David Brown March 22, 20112011-03-22
On 22/03/2011 14:35, rickman wrote:
> On Mar 22, 4:05 am, David Brown<da...@westcontrol.removethisbit.com> > wrote: >> On 21/03/2011 17:28, rickman wrote: >> >> OK. Your viewpoint is as an FPGA expert moving more into >> microcontroller fields, while mine is from long experience with >> microcontrollers and only dabbling in FPGA design. > > I guess that is one way to put it. Certainly my experience with FPGAs > is a lot deeper than with MCUs. I have lots of experience with MCUs > and DSPs, but I've never really popped open the hood on the tools > having always used vendor supplied tools. I have literally no > experience with the gnu tools other than that I host the gnuarm.com > site. But even that is languishing since the guy who used to do the > builds has decided that yagarto is a better way to go and abandoned > the gnuarm effort. :( Someday I need to learn how to build and use > the tools so I can update gnuarm.com. >
Of course, you could just agree with him and point gnuarm.com users to yagarto :-) But building gcc toolchains is fun, if you have the time.
> >>> I expect the debugging capability in the FPGA would be the same sort >>> of basic functionality any debug hardware would include; a means of >>> single stepping at the machine instruction level, breakpoint at an >>> address for instruction fetch or data read/write, read/write memory >>> and registers, perhaps even a trace buffer. If the JTAG interface is >>> fully defined for some simple processor I am sure duplicating that >>> functionality would not be at all hard. The closer I can get to the >>> functionality of a currently supported processor, the fewer changes to >>> the software I will need. >> >> I don't know what processor core you are thinking of on the FPGA, but >> using a pre-built one with a ready-made debug interface will save you a >> lot of effort (assuming, of course, that such cores will do what you >> need). If you are already planning on using Cortex M4 devices, then the >> obvious choice for an FPGA core would be a Cortex M1. But you probably >> already know more about these than I do. > > I plan to gain experience with the Cortex devices. I have worked with > the Luminary Micro parts, but I think the Kinetis line has longer > legs. Or at least they seem like they are going into the CM3/4 area > with guns ablaze! But my real passion at the moment (even if not > financially fruitful) is home grown CPUs in FPGAs. There are some > interesting approaches to CPUs when done in FPGAs that can take > advantage of a simple architecture as well as various optimizations > available in FPGAs to produce small and fast processors. I rolled my > own once and used it in a design, but never had decent tool support. >
You might be interested to look at the ZPU at <http://opensource.zylin.com/zpu.htm>. This is an open source cpu core for FPGAs, with full gcc toolchain support. I am not sure whether the project is still very active (though it is certainly not completely dead) - but it might at least give you some ideas. The main developer is coincidentally also very active as an OpenOCD developer, though as far as I know there is no OpenOCD (or even JTAG) support for the ZPU.
> Right now the only thing between me and a good solution seems to be > connecting to available debug tools through JTAG and adding a new > processor to the tool. Someone I know has done this for some of the > CM3 devices and I am trying to help him with the CM4 Kinetis parts. > Once that goal is reached I figure I'll have enough insight to adapt > the process to my FPGA processors. > > I'm not looking to find a shortest path method adding a CPU to an > FPGA. Those tend to be proprietary and large. I am looking for open > source all the way to give me enough control that I can optimize for > my needs. > > Rick
Reply by rickman March 22, 20112011-03-22
On Mar 22, 4:05=A0am, David Brown <da...@westcontrol.removethisbit.com>
wrote:
> On 21/03/2011 17:28, rickman wrote: > > > > > On Mar 21, 11:12 am, David Brown<da...@westcontrol.removethisbit.com> > > wrote: > >> On 21/03/2011 14:22, rickman wrote: > > >>> He is saying he wants to use OpenOCD rather than Code Red, so I guess > >>> there is some sort of difference there rather than Code Red just > >>> including OpenOCD. > > >> That's like saying "I'd rather use a manual gearbox than a Volvo". =A0=
Code
> >> Red is a company that sells commercially-supported gcc-based embedded > >> toolchains; OpenOCD is a commonly used proxy program to allow gdb to > >> talk to jtag interface hardware. =A0They are different things. > > >> I've looked a little at Code Red's website - it seems that they have > >> their own non-open-source proxy programs (much like CodeSourcery), > >> rather than using OpenOCD. =A0It could be that your developer means "I > >> want to use OpenOCD rather than Code Red's own gdb proxy software". =
=A0If
> >> that's not what he means, then you should worry about the developer. > > > Why on earth would you think he means anything different? > > I /didn't/ think he meant anything different - but I thought it was > worth your while checking. =A0All you said was "he wants to use OpenOCD > rather than Code Red" - so that was all I had to go on. > > > > > > >>> I understand that the standard JTAG connector is there, but do we kno=
w
> >>> that the Kinetis target is supported by OpenOCD? =A0I guess you are > >>> saying that all CM3/4 variants are supported because of the common > >>> nature of the debugging module in the processor. > > >> Yes, that is my understanding. > > >>> On a slightly different note, if I have an embedded processor in an > >>> FPGA which I add a JTAG interface to for debugging, how do I get that > >>> to work with OpenOCD? =A0Is there any documentation on how this tool > >>> works with the debugging hardware (the target, not the JTAG adapter)? > > >> Making a JTAG TAP interface in an FPGA is not trivial, and using the > >> FPGA's JTAG with embedded processors is also complicated unless it is > >> within the FPGA development tools (e.g., if you put a NIOS II in an > >> Altera FPGA, and connect it to the PC using an Altera ByteBlaster, the=
n
> >> Altera's gdb proxy will let you debug using gdb). =A0If you want to go > >> outside the FPGA development tools, then you are going to have to do a > >> fair amount of studying of the documentation for your embedded core an=
d
> >> its debug facilities - you are getting well beyond what you can solve > >> with a few questions on a newsgroup. > > > You are stressing as difficult the parts I have full control over. =A0A > > JTAG TAP is not a complex piece of design. =A0That is well within my > > capabilities, as long as I understand the requirements. =A0The rest of > > the design is fully mine. =A0The part I know little about is on the > > other side of the JTAG adapter. > > OK. =A0Your viewpoint is as an FPGA expert moving more into > microcontroller fields, while mine is from long experience with > microcontrollers and only dabbling in FPGA design.
I guess that is one way to put it. Certainly my experience with FPGAs is a lot deeper than with MCUs. I have lots of experience with MCUs and DSPs, but I've never really popped open the hood on the tools having always used vendor supplied tools. I have literally no experience with the gnu tools other than that I host the gnuarm.com site. But even that is languishing since the guy who used to do the builds has decided that yagarto is a better way to go and abandoned the gnuarm effort. :( Someday I need to learn how to build and use the tools so I can update gnuarm.com.
> > I expect the debugging capability in the FPGA would be the same sort > > of basic functionality any debug hardware would include; a means of > > single stepping at the machine instruction level, breakpoint at an > > address for instruction fetch or data read/write, read/write memory > > and registers, perhaps even a trace buffer. =A0If the JTAG interface is > > fully defined for some simple processor I am sure duplicating that > > functionality would not be at all hard. =A0The closer I can get to the > > functionality of a currently supported processor, the fewer changes to > > the software I will need. > > I don't know what processor core you are thinking of on the FPGA, but > using a pre-built one with a ready-made debug interface will save you a > lot of effort (assuming, of course, that such cores will do what you > need). =A0If you are already planning on using Cortex M4 devices, then th=
e
> obvious choice for an FPGA core would be a Cortex M1. =A0But you probably > already know more about these than I do.
I plan to gain experience with the Cortex devices. I have worked with the Luminary Micro parts, but I think the Kinetis line has longer legs. Or at least they seem like they are going into the CM3/4 area with guns ablaze! But my real passion at the moment (even if not financially fruitful) is home grown CPUs in FPGAs. There are some interesting approaches to CPUs when done in FPGAs that can take advantage of a simple architecture as well as various optimizations available in FPGAs to produce small and fast processors. I rolled my own once and used it in a design, but never had decent tool support. Right now the only thing between me and a good solution seems to be connecting to available debug tools through JTAG and adding a new processor to the tool. Someone I know has done this for some of the CM3 devices and I am trying to help him with the CM4 Kinetis parts. Once that goal is reached I figure I'll have enough insight to adapt the process to my FPGA processors. I'm not looking to find a shortest path method adding a CPU to an FPGA. Those tend to be proprietary and large. I am looking for open source all the way to give me enough control that I can optimize for my needs. Rick
Reply by David Brown March 22, 20112011-03-22
On 21/03/2011 17:28, rickman wrote:
> On Mar 21, 11:12 am, David Brown<da...@westcontrol.removethisbit.com> > wrote: >> On 21/03/2011 14:22, rickman wrote: >> >>> He is saying he wants to use OpenOCD rather than Code Red, so I guess >>> there is some sort of difference there rather than Code Red just >>> including OpenOCD. >> >> That's like saying "I'd rather use a manual gearbox than a Volvo". Code >> Red is a company that sells commercially-supported gcc-based embedded >> toolchains; OpenOCD is a commonly used proxy program to allow gdb to >> talk to jtag interface hardware. They are different things. >> >> I've looked a little at Code Red's website - it seems that they have >> their own non-open-source proxy programs (much like CodeSourcery), >> rather than using OpenOCD. It could be that your developer means "I >> want to use OpenOCD rather than Code Red's own gdb proxy software". If >> that's not what he means, then you should worry about the developer. > > Why on earth would you think he means anything different? >
I /didn't/ think he meant anything different - but I thought it was worth your while checking. All you said was "he wants to use OpenOCD rather than Code Red" - so that was all I had to go on.
> >>> I understand that the standard JTAG connector is there, but do we know >>> that the Kinetis target is supported by OpenOCD? I guess you are >>> saying that all CM3/4 variants are supported because of the common >>> nature of the debugging module in the processor. >> >> Yes, that is my understanding. >> >>> On a slightly different note, if I have an embedded processor in an >>> FPGA which I add a JTAG interface to for debugging, how do I get that >>> to work with OpenOCD? Is there any documentation on how this tool >>> works with the debugging hardware (the target, not the JTAG adapter)? >> >> Making a JTAG TAP interface in an FPGA is not trivial, and using the >> FPGA's JTAG with embedded processors is also complicated unless it is >> within the FPGA development tools (e.g., if you put a NIOS II in an >> Altera FPGA, and connect it to the PC using an Altera ByteBlaster, then >> Altera's gdb proxy will let you debug using gdb). If you want to go >> outside the FPGA development tools, then you are going to have to do a >> fair amount of studying of the documentation for your embedded core and >> its debug facilities - you are getting well beyond what you can solve >> with a few questions on a newsgroup. > > You are stressing as difficult the parts I have full control over. A > JTAG TAP is not a complex piece of design. That is well within my > capabilities, as long as I understand the requirements. The rest of > the design is fully mine. The part I know little about is on the > other side of the JTAG adapter. >
OK. Your viewpoint is as an FPGA expert moving more into microcontroller fields, while mine is from long experience with microcontrollers and only dabbling in FPGA design.
> I expect the debugging capability in the FPGA would be the same sort > of basic functionality any debug hardware would include; a means of > single stepping at the machine instruction level, breakpoint at an > address for instruction fetch or data read/write, read/write memory > and registers, perhaps even a trace buffer. If the JTAG interface is > fully defined for some simple processor I am sure duplicating that > functionality would not be at all hard. The closer I can get to the > functionality of a currently supported processor, the fewer changes to > the software I will need. >
I don't know what processor core you are thinking of on the FPGA, but using a pre-built one with a ready-made debug interface will save you a lot of effort (assuming, of course, that such cores will do what you need). If you are already planning on using Cortex M4 devices, then the obvious choice for an FPGA core would be a Cortex M1. But you probably already know more about these than I do.
Reply by rickman March 21, 20112011-03-21
On Mar 21, 11:12=A0am, David Brown <da...@westcontrol.removethisbit.com>
wrote:
> On 21/03/2011 14:22, rickman wrote: > > > He is saying he wants to use OpenOCD rather than Code Red, so I guess > > there is some sort of difference there rather than Code Red just > > including OpenOCD. > > That's like saying "I'd rather use a manual gearbox than a Volvo". =A0Cod=
e
> Red is a company that sells commercially-supported gcc-based embedded > toolchains; OpenOCD is a commonly used proxy program to allow gdb to > talk to jtag interface hardware. =A0They are different things. > > I've looked a little at Code Red's website - it seems that they have > their own non-open-source proxy programs (much like CodeSourcery), > rather than using OpenOCD. =A0It could be that your developer means "I > want to use OpenOCD rather than Code Red's own gdb proxy software". =A0If > that's not what he means, then you should worry about the developer.
Why on earth would you think he means anything different?
> > I understand that the standard JTAG connector is there, but do we know > > that the Kinetis target is supported by OpenOCD? =A0I guess you are > > saying that all CM3/4 variants are supported because of the common > > nature of the debugging module in the processor. > > Yes, that is my understanding. > > > On a slightly different note, if I have an embedded processor in an > > FPGA which I add a JTAG interface to for debugging, how do I get that > > to work with OpenOCD? =A0Is there any documentation on how this tool > > works with the debugging hardware (the target, not the JTAG adapter)? > > Making a JTAG TAP interface in an FPGA is not trivial, and using the > FPGA's JTAG with embedded processors is also complicated unless it is > within the FPGA development tools (e.g., if you put a NIOS II in an > Altera FPGA, and connect it to the PC using an Altera ByteBlaster, then > Altera's gdb proxy will let you debug using gdb). =A0If you want to go > outside the FPGA development tools, then you are going to have to do a > fair amount of studying of the documentation for your embedded core and > its debug facilities - you are getting well beyond what you can solve > with a few questions on a newsgroup.
You are stressing as difficult the parts I have full control over. A JTAG TAP is not a complex piece of design. That is well within my capabilities, as long as I understand the requirements. The rest of the design is fully mine. The part I know little about is on the other side of the JTAG adapter. I expect the debugging capability in the FPGA would be the same sort of basic functionality any debug hardware would include; a means of single stepping at the machine instruction level, breakpoint at an address for instruction fetch or data read/write, read/write memory and registers, perhaps even a trace buffer. If the JTAG interface is fully defined for some simple processor I am sure duplicating that functionality would not be at all hard. The closer I can get to the functionality of a currently supported processor, the fewer changes to the software I will need. Rick
Reply by David Brown March 21, 20112011-03-21
On 21/03/2011 14:22, rickman wrote:
> On Mar 20, 4:05 pm, David Brown<david.br...@removethis.hesbynett.no> > wrote: >> On 20/03/11 18:18, rickman wrote: >> >>> On Mar 20, 9:40 am, David Brown<david.br...@removethis.hesbynett.no> >>> wrote: >> >>>> Of course, there is another possible route. The Kinetis development >>>> cards have a standard ARM jtag port, as far as I can see, in addition to >>>> the OSJTAG USB device. So you can use any other Cortex-compatible >>>> debugger with them - ranging from powerful "intelligent" devices like >>>> the ZY1000 to cheap (or even home-made) FTDI-based devices. So while I >>>> hope that OSJTAG support will make its way into OpenOCD sometime (and if >>>> Freescale are on the ball, they will contribute to that work >>>> themselves), you can always get around it with some cheap and simple >>>> hardware. >> >>> Ok, that brings me to another question. If a more conventional JTAG >>> adapter is uses, say something very dumb like a wiggler, I assume that >>> OpenOCD then needs to be modified for the specific targets to be >>> supported. In the case of the Kinetis devices, I expect supporting >>> one would be pretty much like supporting them all. But this is not >>> likely to be the same as support for other Cortex M3/4 devices, or >>> will it be the same? >> >> One of the nice things about the Cortex (as distinct from previous ARM >> cores) is that the debug module is a fundamental part of Cortex, rather >> than being made or adapted by the chip designer. So all Cortex debug >> blocks will be compatible and follow the same standards. Thus once you >> support one Cortex, you support them all. At least, that applies within >> the Cortex family group (such as M3/4) - I can't be sure if it is the >> same for Cortex A or R devices. Some devices may have extra debug >> facilities, but the basic jtag debugging interface is always the same. >> >> There are some things that vary between target systems, such as the >> memory layout and flash types. OpenOCD also supports flash programming >> and other sorts of board initialisation (such as clock configuration, >> disabling watchdogs, etc.). This needs to be specific for different >> systems, but it is mostly handled by initialisation scripts rather than >> changes to OpenOCD code. Significant differences in flash programming >> algorithms may need changes to the OpenOCD code, however. > > Sure, the target systems will vary, but that is something that will > always be supported by the tools, right? It is issues with the target > processor I am trying to understand. >
There should not be any issues with the target processor, as far as I know. I haven't tried the Kinetis (or any other M4 chip) as yet, so I have no guarantees - only the expectations I have based on my reading. The Cortex devices have the same base debug features (there are optional extras, such as ETM), so any debugger that supports one Cortex M device through jtag should support them all.
> >>> I want to work with a developer who currently supports several CM3 >>> devices. I want to find a way to get him the debugging support he >>> wants so that he will support the CM4 Kinetis devices. He has said he >>> wants to work with OpenOCD. He mentioned something about Code Red not >>> being his favorite. I guess Code Red is an alternative to OpenOCD? >> >> Code Red is a commercial gcc toolchain vendor (like CodeSourcery). They >> package gcc, a library (I don't know if it is their own library, or >> something general like newlib), an IDE (I guess Eclipse) and debugger in >> a paid-for and supported packaging. I haven't used it, but it seems to >> be quite popular in the USA. I would guess that Code Red uses OpenOCD >> as a gdb proxy for debugging, though maybe they have their own system >> (as CodeSourcery does). > > He is saying he wants to use OpenOCD rather than Code Red, so I guess > there is some sort of difference there rather than Code Red just > including OpenOCD. >
That's like saying "I'd rather use a manual gearbox than a Volvo". Code Red is a company that sells commercially-supported gcc-based embedded toolchains; OpenOCD is a commonly used proxy program to allow gdb to talk to jtag interface hardware. They are different things. I've looked a little at Code Red's website - it seems that they have their own non-open-source proxy programs (much like CodeSourcery), rather than using OpenOCD. It could be that your developer means "I want to use OpenOCD rather than Code Red's own gdb proxy software". If that's not what he means, then you should worry about the developer.
> >>> If the Freescale supported debugging is through sprites with GDB this >>> may not be what he wants. I'll have to ask some intelligent questions >>> now that I understand the issues better. >> >> As I said earlier, you can connect a normal external jtag interface >> cable to the Kinetis cards and use that along with OpenOCD. And the >> micros themselves certainly have the standard ARM Cortex jtag debugging >> port. The only question is whether you can use the onboard USB-to-jtag >> interface on the Tower development boards. You /can/ do that if you use >> CodeSourcery and pay for the use of their sprites. You /cannot/ do it >> with OpenOCD at the moment. OpenOCD will probably get support for them, >> if it is not to hard to do, but it is not there yet. >> >> But for now, the easiest answer is probably to buy a cheap FTDI-based >> debugger and use that with OpenOCD - just ignore the Tower's USB-to-jtag >> interface entirely. > > I understand that the standard JTAG connector is there, but do we know > that the Kinetis target is supported by OpenOCD? I guess you are > saying that all CM3/4 variants are supported because of the common > nature of the debugging module in the processor. >
Yes, that is my understanding.
> On a slightly different note, if I have an embedded processor in an > FPGA which I add a JTAG interface to for debugging, how do I get that > to work with OpenOCD? Is there any documentation on how this tool > works with the debugging hardware (the target, not the JTAG adapter)? >
Making a JTAG TAP interface in an FPGA is not trivial, and using the FPGA's JTAG with embedded processors is also complicated unless it is within the FPGA development tools (e.g., if you put a NIOS II in an Altera FPGA, and connect it to the PC using an Altera ByteBlaster, then Altera's gdb proxy will let you debug using gdb). If you want to go outside the FPGA development tools, then you are going to have to do a fair amount of studying of the documentation for your embedded core and its debug facilities - you are getting well beyond what you can solve with a few questions on a newsgroup. mvh., David
Reply by rickman March 21, 20112011-03-21
On Mar 20, 4:05=A0pm, David Brown <david.br...@removethis.hesbynett.no>
wrote:
> On 20/03/11 18:18, rickman wrote: > > > On Mar 20, 9:40 am, David Brown<david.br...@removethis.hesbynett.no> > > wrote: > > >> Of course, there is another possible route. =A0The Kinetis development > >> cards have a standard ARM jtag port, as far as I can see, in addition =
to
> >> the OSJTAG USB device. =A0So you can use any other Cortex-compatible > >> debugger with them - ranging from powerful "intelligent" devices like > >> the ZY1000 to cheap (or even home-made) FTDI-based devices. =A0So whil=
e I
> >> hope that OSJTAG support will make its way into OpenOCD sometime (and =
if
> >> Freescale are on the ball, they will contribute to that work > >> themselves), you can always get around it with some cheap and simple > >> hardware. > > > Ok, that brings me to another question. =A0If a more conventional JTAG > > adapter is uses, say something very dumb like a wiggler, I assume that > > OpenOCD then needs to be modified for the specific targets to be > > supported. =A0In the case of the Kinetis devices, I expect supporting > > one would be pretty much like supporting them all. =A0But this is not > > likely to be the same as support for other Cortex M3/4 devices, or > > will it be the same? > > One of the nice things about the Cortex (as distinct from previous ARM > cores) is that the debug module is a fundamental part of Cortex, rather > than being made or adapted by the chip designer. =A0So all Cortex debug > blocks will be compatible and follow the same standards. =A0Thus once you > support one Cortex, you support them all. =A0At least, that applies withi=
n
> the Cortex family group (such as M3/4) - I can't be sure if it is the > same for Cortex A or R devices. =A0Some devices may have extra debug > facilities, but the basic jtag debugging interface is always the same. > > There are some things that vary between target systems, such as the > memory layout and flash types. =A0OpenOCD also supports flash programming > and other sorts of board initialisation (such as clock configuration, > disabling watchdogs, etc.). =A0This needs to be specific for different > systems, but it is mostly handled by initialisation scripts rather than > changes to OpenOCD code. =A0Significant differences in flash programming > algorithms may need changes to the OpenOCD code, however.
Sure, the target systems will vary, but that is something that will always be supported by the tools, right? It is issues with the target processor I am trying to understand.
> > I want to work with a developer who currently supports several CM3 > > devices. =A0I want to find a way to get him the debugging support he > > wants so that he will support the CM4 Kinetis devices. =A0He has said h=
e
> > wants to work with OpenOCD. =A0He mentioned something about Code Red no=
t
> > being his favorite. =A0I guess Code Red is an alternative to OpenOCD? > > Code Red is a commercial gcc toolchain vendor (like CodeSourcery). =A0The=
y
> package gcc, a library (I don't know if it is their own library, or > something general like newlib), an IDE (I guess Eclipse) and debugger in > a paid-for and supported packaging. =A0I haven't used it, but it seems to > be quite popular in the USA. =A0I would guess that Code Red uses OpenOCD > as a gdb proxy for debugging, though maybe they have their own system > (as CodeSourcery does).
He is saying he wants to use OpenOCD rather than Code Red, so I guess there is some sort of difference there rather than Code Red just including OpenOCD.
> > If the Freescale supported debugging is through sprites with GDB this > > may not be what he wants. =A0I'll have to ask some intelligent question=
s
> > now that I understand the issues better. > > As I said earlier, you can connect a normal external jtag interface > cable to the Kinetis cards and use that along with OpenOCD. =A0And the > micros themselves certainly have the standard ARM Cortex jtag debugging > port. =A0The only question is whether you can use the onboard USB-to-jtag > interface on the Tower development boards. =A0You /can/ do that if you us=
e
> CodeSourcery and pay for the use of their sprites. =A0You /cannot/ do it > with OpenOCD at the moment. =A0OpenOCD will probably get support for them=
,
> if it is not to hard to do, but it is not there yet. > > But for now, the easiest answer is probably to buy a cheap FTDI-based > debugger and use that with OpenOCD - just ignore the Tower's USB-to-jtag > interface entirely.
I understand that the standard JTAG connector is there, but do we know that the Kinetis target is supported by OpenOCD? I guess you are saying that all CM3/4 variants are supported because of the common nature of the debugging module in the processor. On a slightly different note, if I have an embedded processor in an FPGA which I add a JTAG interface to for debugging, how do I get that to work with OpenOCD? Is there any documentation on how this tool works with the debugging hardware (the target, not the JTAG adapter)? Rick