> On May 14, 2:35 pm, Andrew Jackson<a...@nospam.com> wrote:
>> On 14/05/2011 17:29, linnix wrote:
>>
>>> On May 14, 9:12 am, "navman"<naveen_pn@n_o_s_p_a_m.yahoo.com> wrote:
>>>> Hi,
>>>> We are designing a device which needs to transfer data to a PC over USB
>>>> continuously. We plan to use the LPC1768 Cortex-M3 processor for this
>>>> application. We would like some opinion on the best approach for the USB
>>>> class implementation. We are looking at about 400Kbytes/sec sustainable
>>>> transfer rate between the device to PC. The reverse traffic will be quite
>>>> lean.
>>
>>> We get over 500KB/s with a 32mHz PIC24, so M3 should be doable.
>>> However, we are using asynchronous ACK/NAK protocols.
>>
>> I don't think that you mean that do you?
>
> Yes, full speed bandwidth is 12M, 500K is around 4M.
Apologies, brain fade!
Andrew
Reply by linnix●May 14, 20112011-05-14
On May 14, 2:35=A0pm, Andrew Jackson <a...@nospam.com> wrote:
> On 14/05/2011 17:29, linnix wrote:
>
> > On May 14, 9:12 am, "navman"<naveen_pn@n_o_s_p_a_m.yahoo.com> =A0wrote:
> >> Hi,
> >> We are designing a device which needs to transfer data to a PC over US=
B
> >> continuously. We plan to use the LPC1768 Cortex-M3 processor for this
> >> application. We would like some opinion on the best approach for the U=
SB
> >> class implementation. We are looking at about 400Kbytes/sec sustainabl=
e
> >> transfer rate between the device to PC. The reverse traffic will be qu=
ite
> >> lean.
>
> > We get over 500KB/s with a 32mHz PIC24, so M3 should be doable.
> > However, we are using asynchronous ACK/NAK protocols.
>
> I don't think that you mean that do you?
Yes, full speed bandwidth is 12M, 500K is around 4M.
>=A0USB 2.0 high speed can manage
> a maximum 480Mbps but the actual rate is less allowing for turn-arounds,
> inter-packet gaps, etc.
That why we need asynch. bulk transfer. Max. transfer is to internal
SRAM only, 96K for 1/5 of a second.