> On SPI, is the shift register different than the data register? In
> other words, if I am a slave, can I put data in
the SPI data register
> any time even while a transition is in progress? On PIC micros this is
> safe practice but what about LPC?
SPI Data Register
User Manual excerpt:
"Writes to this register will be blocked from when a data transfer starts
to
when the SPIF status bit is set, and the status register has not been
read."
SSP port:
8 byte rx/tx FIFO, max speed is pclk/2. You can fill FIFO at full speed,
refill from interrupt, or poll FIFO register for state change.
Joel
Hello,
On SPI, is the shift register different than the data register? In
other words, if I am a slave, can I put data in the SPI data register
any time even while a transition is in progress? On PIC micros this is
safe practice but what about LPC?
Thanks,
Gus