Reply by Allan Herriman●October 22, 20122012-10-22
On Mon, 22 Oct 2012 09:50:31 +0000, Allan Herriman wrote:
> On Sun, 21 Oct 2012 09:03:56 -0700, Simon wrote:
>
>> So, I have a power headache :)
>>
>> One of the chips I want to use in a project has very specific power
> requirements ...
>>
>> - The VDD supply must ramp from 0V to its final value within 10ms to
> ensure correct startup.
>> - The IO VDD supply must ramp to its final value before VDD reaches
> 0.4 V.
>> - The power supplies must be brought up monotonically - (other stuff
>> that's not so relevant)
>>
>> ... and at the same time, I need a fair amount of power (in this case
> about 5A on the 3.3v supply and about 2A on the 1V supply to cover the
> worst-case scenarios). As far as I'm aware, there isn't a single chip
> solution that can handle this, so I'm trying to figure out how to
> guarantee all the above.
>>
>> One way I came up with was to sample the 3.3v and 1v lines via an AVR
> chip's built-in ADC's. There's already an AVR on-board so it doesn't
> need any more components, just a bit of wiring. Once the voltages have
> stabilised to their correct final values, I would just have the AVR
> allow the supply of voltage to the rest of the board.
>>
>> The question is how to do that ? I thought of using solid-state relays,
> but looking at the ones at digikey that can handle the power, the
> variance in on-time switching is such that I'm not sure the monotonicity
> (which I'm interpreting to mean 'at the same time') would be preserved.
>>
>> So, a vague thought about MOSFETs surfaced - thing is I've never used
> them, hence this long plea for help :) A few questions:
>>
>> - Can I just connect the source to v-reg output, drain to the rest-of-
> the-world, and gate to the AVR to switch 5A ?
>>
>> - Does a MOSFET care about the voltage it's switching ? In other
> words, will it work if Vds = 1v ? In the datasheets, I only see maxima
> specified, so I'm assuming there is no minimum value but it's worth
> asking :)
>>
>> - Any recommendations on which one to use ?
>>
>> - Is there a better way to do this that I'm missing ? :)
>>
>> Cheers
>> Simon.
>
>
> I did something like that in a recent design.
>
> In my case, I used multiple LTM4614 DC/DC converters. These have open
> drain power power_good outputs and track inputs. The internal Vref is
> 0.8V and it will use the track input instead if it is < 0.8V, switching
> to the fixed Vref once the track input exceeds 0.8V. This allows direct
> control over the output voltage.
>
> The "synchronisation" (usually called "sequencing" in the context of
> power supply design) was achieved by connecting the power good output of
> one stage to the track input of the next. This would hold the output of
> one DC/DC converter at 0V until the previous one reached about 90% of
> its final value. An RC network on the track input made the output
> voltage rise at a predictable, monotonic rate.
>
> The LTM4614 isn't cheap, but it did what I wanted. (I was more
> interested in its small size for this particular project.)
>
> Many DC/DC controllers have track inputs. Often this function is
> overloaded on the soft-start pin, so you have to read the datasheet
> carefully to work out whether it will do the job for you.
>
> Except for the 5A requirement, a single LTM4614 could do everything you
> ask.
>
> Regards,
> Allan
Here is is in ASCII art:
stage N vbias stage N+1
+-----------+ | +-----------+
| | R | |
| | R | |
| | | | |
| Pgd |----+-+--|Track |
| | | | |
+-----------+ | +-----------+
===
|
gnd
The output of stage N+1 is held at 0V and doesn't start to ramp until the
output of stage N has reached its Power_good threshold.
Vbias must be greater than 0.8V (or whatever the cutover voltage for the
track input is).
Regards,
Allan
Reply by Allan Herriman●October 22, 20122012-10-22
On Sun, 21 Oct 2012 09:03:56 -0700, Simon wrote:
> So, I have a power headache :)
>
> One of the chips I want to use in a project has very specific power
requirements ...
>
> - The VDD supply must ramp from 0V to its final value within 10ms to
ensure correct startup.
> - The IO VDD supply must ramp to its final value before VDD reaches
0.4 V.
> - The power supplies must be brought up monotonically
> - (other stuff that's not so relevant)
>
> ... and at the same time, I need a fair amount of power (in this case
about 5A on the 3.3v supply and about 2A on the 1V supply to cover the
worst-case scenarios). As far as I'm aware, there isn't a single chip
solution that can handle this, so I'm trying to figure out how to
guarantee all the above.
>
> One way I came up with was to sample the 3.3v and 1v lines via an AVR
chip's built-in ADC's. There's already an AVR on-board so it doesn't need
any more components, just a bit of wiring. Once the voltages have
stabilised to their correct final values, I would just have the AVR allow
the supply of voltage to the rest of the board.
>
> The question is how to do that ? I thought of using solid-state relays,
but looking at the ones at digikey that can handle the power, the
variance in on-time switching is such that I'm not sure the monotonicity
(which I'm interpreting to mean 'at the same time') would be preserved.
>
> So, a vague thought about MOSFETs surfaced - thing is I've never used
them, hence this long plea for help :) A few questions:
>
> - Can I just connect the source to v-reg output, drain to the rest-of-
the-world, and gate to the AVR to switch 5A ?
>
> - Does a MOSFET care about the voltage it's switching ? In other
words, will it work if Vds = 1v ? In the datasheets, I only see maxima
specified, so I'm assuming there is no minimum value but it's worth
asking :)
>
> - Any recommendations on which one to use ?
>
> - Is there a better way to do this that I'm missing ? :)
>
> Cheers
> Simon.
I did something like that in a recent design.
In my case, I used multiple LTM4614 DC/DC converters. These have open
drain power power_good outputs and track inputs. The internal Vref is
0.8V and it will use the track input instead if it is < 0.8V, switching
to the fixed Vref once the track input exceeds 0.8V. This allows direct
control over the output voltage.
The "synchronisation" (usually called "sequencing" in the context of
power supply design) was achieved by connecting the power good output of
one stage to the track input of the next. This would hold the output of
one DC/DC converter at 0V until the previous one reached about 90% of its
final value. An RC network on the track input made the output voltage
rise at a predictable, monotonic rate.
The LTM4614 isn't cheap, but it did what I wanted. (I was more
interested in its small size for this particular project.)
Many DC/DC controllers have track inputs. Often this function is
overloaded on the soft-start pin, so you have to read the datasheet
carefully to work out whether it will do the job for you.
Except for the 5A requirement, a single LTM4614 could do everything you
ask.
Regards,
Allan
Reply by rickman●October 21, 20122012-10-21
On 10/21/2012 12:03 PM, Simon wrote:
> So, I have a power headache :)
>
> One of the chips I want to use in a project has very specific power requirements ...
>
> - The VDD supply must ramp from 0V to its final value within 10ms to ensure correct startup.
> - The IO VDD supply must ramp to its final value before VDD reaches 0.4 V.
> - The power supplies must be brought up monotonically
> - (other stuff that's not so relevant)
>
> .... and at the same time, I need a fair amount of power (in this case about 5A on the 3.3v supply and about 2A on the 1V supply to cover the worst-case scenarios). As far as I'm aware, there isn't a single chip solution that can handle this, so I'm trying to figure out how to guarantee all the above..
>
> One way I came up with was to sample the 3.3v and 1v lines via an AVR chip's built-in ADC's. There's already an AVR on-board so it doesn't need any more components, just a bit of wiring. Once the voltages have stabilised to their correct final values, I would just have the AVR allow the supply of voltage to the rest of the board.
>
> The question is how to do that ? I thought of using solid-state relays, but looking at the ones at digikey that can handle the power, the variance in on-time switching is such that I'm not sure the monotonicity (which I'm interpreting to mean 'at the same time') would be preserved.
>
> So, a vague thought about MOSFETs surfaced - thing is I've never used them, hence this long plea for help :) A few questions:
>
> - Can I just connect the source to v-reg output, drain to the rest-of-the-world, and gate to the AVR to switch 5A ?
>
> - Does a MOSFET care about the voltage it's switching ? In other words, will it work if Vds = 1v ? In the datasheets, I only see maxima specified, so I'm assuming there is no minimum value but it's worth asking :)
>
> - Any recommendations on which one to use ?
>
> - Is there a better way to do this that I'm missing ? :)
>
> Cheers
> Simon.
>
Monotonic means that the voltages ramp up without reversing. It has
nothing to do with the synchronization. Each supply has to increase
voltage to the final value without the voltage lowering at any point.
The rest of your problem remains.
Rick
Reply by David Brown●October 21, 20122012-10-21
On 21/10/12 18:03, Simon wrote:
> So, I have a power headache :)
>
> One of the chips I want to use in a project has very specific power
> requirements ...
>
> - The VDD supply must ramp from 0V to its final value within 10ms to
> ensure correct startup. - The IO VDD supply must ramp to its final
> value before VDD reaches 0.4 V. - The power supplies must be brought
> up monotonically - (other stuff that's not so relevant)
>
> ... and at the same time, I need a fair amount of power (in this case
> about 5A on the 3.3v supply and about 2A on the 1V supply to cover
> the worst-case scenarios). As far as I'm aware, there isn't a single
> chip solution that can handle this, so I'm trying to figure out how
> to guarantee all the above.
>
You need a fair amount of power - but that doesn't necessarily imply
that you need maximal efficiency.
A simple way to ensure that all your power supplies rise and fall
together is to have one switch-mode (or linear, if you want) power
supply for the highest voltage supply. All your lower supplies are
generated by LDO linear regulators from that supply. When your 3.3V
supply rises, your 1V supply will follow it within perhaps 0.2V until it
hits 1V.
For safe power-off, put a schottkey going from each lower voltage supply
up to the next higher voltage supply - then you will never get the 3.3V
line more than about 0.1V below the 1V line (if you skip this, you can
get odd effects if the capacitance on the lower line holds 1V longer
than the capacitance on the 3.3V line).
Reply by Simon●October 21, 20122012-10-21
On Sunday, October 21, 2012 11:29:48 AM UTC-7, Tim Wescott wrote:
>
> Better yet -- do you have to control the 3.3V supply at all? Reading
> your constraints, I don't see anything that says the 3.3V supply can't be
> on for a day before you switch on the 1V: am I getting it right?
In fact, I think you may be right. I was interpreting 'monotonically' incorrectly to be 'at one time' rather than 'always increasing', I think. I'm going to raise a support ticket with XMOS to be sure, but on a different chip they have a FAQ saying that VDDIO must be fully operational before VDD is powered, which is a far cry from the tight specifications I had in mind above.
In which case, the whole MOSFET thing is not required - I can power up both 5v and 3.3v supplies at boot and once the AVR reads 3.3v is available, it can enable the 1v regulator via an enable-pin. Job done.
Still, it was good to find out about MOSFETs a little, thanks all :)
Simon.
Reply by Tim Wescott●October 21, 20122012-10-21
On Sun, 21 Oct 2012 11:06:14 -0700, Simon wrote:
> On Sunday, October 21, 2012 9:30:17 AM UTC-7, Tim Wescott wrote:
>>
>> Are there any app notes from the manufacturer on how to do this?
>
> Not at this power level. Their (XMOS) reference design uses an LTC3417
> which supplies 1.5A/1.5A. This is actually underpowered (by my
> reckoning) for the chip they're using anyway, but its possible it's fine
> in the specific case of that design.
>
> I'm trying to power a video decoder, a JPEG2k encoder, the XMOS chip, an
> AVR and a USB fifo, as well as the ancillary support components and my
> power budget is a little higher.
>
>> If you're going to do the power supply sequencing with an AVR, and you
>> turn on "the rest of the board" last, and the AVR is on "the rest of
>> the board", will it work?
>
> [grin]. No, the AVR has its own 5v voltage regulator and is sufficiently
> isolated from the rest of the board to work :)
>
>> The MOSFET does not care about minimum voltages. It does care about
>> gate-
>> source voltage (it needs enough). The rest of your circuit cares about
>> voltage drops. So you may have a challenge finding FETs with low
>> enough
>> drain-source resistance for you, at the gate-source voltages that you
>> can achieve.
>
> Hmm. All I'm seeing in the datasheets (eg:
> http://www.vishay.com/docs/69940/si2305ad.pdf) are limits, eg:
>
> Parameter Symbol Limit
> Drain-Source voltage Vds -8v Gate-Source
> voltage Vgs +/-8v Gate-Source threshold
> voltage Vgs(th) -0.45v < typical < -0.8v
>
> Is there something I ought to be looking for that would let me derive
> whether a particular MOSFET was suitable ?
>
> Or, does anyone have a 'Noddies guide' to how to start using these
> things ? :)
>
> Cheers
> Simon
In your case the two most important parameters are the Rds(ON), which is
the effective resistance of the part at the specified gate-source
voltage, and the power dissipation.
The Rds(ON) affects both the voltage drop across the part (which affects
the quality of your power supply), and the power dissipated in the part.
If you're a beginner, be very careful of the current and power
dissipation ratings: they're probably based on some unrealistic amounts
of heat sinking, and possibly unrealistic ambient temperatures. You
probably need to do the thermal calculations yourself.
That P-channel part will probably work for your 3.3V supply, but it's not
rated for a 1V g-s voltage, which is what you'd have available pulling
the gate low with a pin on the processor. For the 1-V supply, if you
connect an N-channel part as a source follower, then when you raise the
gate to +5V you'll have a 4V g-s voltage, which would be plenty in a
comparable N-channel part.
If you have a supply that goes above 5V, you might want to consider using
N-channel parts for both FETs. Connect the 1V switch to a processor pin
through an RC per Vladimir's suggestion, and connect the 3.3V switch
through a level shifter.
Better yet -- do you have to control the 3.3V supply at all? Reading
your constraints, I don't see anything that says the 3.3V supply can't be
on for a day before you switch on the 1V: am I getting it right?
--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
Reply by Simon●October 21, 20122012-10-21
On Sunday, October 21, 2012 11:22:10 AM UTC-7, lang...@fonz.dk wrote:
>
>
> use regulators with enable and powergood, use powergood on IOVDD to
> enable VDD ?
Yeah, I thought of that, but I think it might not match the 'monotonicity' clause. I don't know how much slack I have between IOVDD and VDD being brought up, but if they're stating it as a design requirement, I'm assuming it's not much...
Simon
Reply by lang...@fonz.dk●October 21, 20122012-10-21
On 21 Okt., 18:03, Simon <goo...@gornall.net> wrote:
> So, I have a power headache :)
>
> One of the chips I want to use in a project has very specific power requirements ...
>
> �- The VDD supply must ramp from 0V to its final value within 10ms to ensure correct startup.
> �- The IO VDD supply must ramp to its final value before VDD reaches 0.4 V.
> �- The power supplies must be brought up monotonically
> �- (other stuff that's not so relevant)
>
> ... and at the same time, I need a fair amount of power (in this case about 5A on the 3.3v supply and about 2A on the 1V supply to cover the worst-case scenarios). As far as I'm aware, there isn't a single chip solution that can handle this, so I'm trying to figure out how to guarantee all the above.
>
> One way I came up with was to sample the 3.3v and 1v lines via an AVR chip's built-in ADC's. There's already an AVR on-board so it doesn't need any more components, just a bit of wiring. Once the voltages have stabilised to their correct final values, I would just have the AVR allow the supply of voltage to the rest of the board.
>
> The question is how to do that ? I thought of using solid-state relays, but looking at the ones at digikey that can handle the power, the variance in on-time switching is such that I'm not sure the monotonicity (which I'm interpreting to mean 'at the same time') would be preserved.
>
> So, a vague thought about MOSFETs surfaced - thing is I've never used them, hence this long plea for help :) A few questions:
>
> �- Can I just connect the source to v-reg output, drain to the rest-of-the-world, and gate to the AVR to switch 5A ?
>
> �- Does a MOSFET care about the voltage it's switching ? In other words, will it work if Vds = 1v ? In the datasheets, I only see maxima specified, so I'm assuming there is no minimum value but it's worth asking :)
>
> �- Any recommendations on which one to use ?
>
> �- Is there a better way to do this that I'm missing ? :)
>
> Cheers
> � �Simon.
use regulators with enable and powergood, use powergood on IOVDD to
enable VDD ?
-Lasse
Reply by Simon●October 21, 20122012-10-21
On Sunday, October 21, 2012 9:30:17 AM UTC-7, Tim Wescott wrote:
>
> Are there any app notes from the manufacturer on how to do this?
Not at this power level. Their (XMOS) reference design uses an LTC3417 which supplies 1.5A/1.5A. This is actually underpowered (by my reckoning) for the chip they're using anyway, but its possible it's fine in the specific case of that design.
I'm trying to power a video decoder, a JPEG2k encoder, the XMOS chip, an AVR and a USB fifo, as well as the ancillary support components and my power budget is a little higher.
> If you're going to do the power supply sequencing with an AVR, and you
> turn on "the rest of the board" last, and the AVR is on "the rest of the
> board", will it work?
[grin]. No, the AVR has its own 5v voltage regulator and is sufficiently isolated from the rest of the board to work :)
> The MOSFET does not care about minimum voltages. It does care about gate-
> source voltage (it needs enough). The rest of your circuit cares about
> voltage drops. So you may have a challenge finding FETs with low enough
> drain-source resistance for you, at the gate-source voltages that you can
> achieve.
Hmm. All I'm seeing in the datasheets (eg: http://www.vishay.com/docs/69940/si2305ad.pdf) are limits, eg:
Parameter Symbol Limit
Drain-Source voltage Vds -8v
Gate-Source voltage Vgs +/-8v
Gate-Source threshold voltage Vgs(th) -0.45v < typical < -0.8v
Is there something I ought to be looking for that would let me derive whether a particular MOSFET was suitable ?
Or, does anyone have a 'Noddies guide' to how to start using these things ? :)
Cheers
Simon
Reply by Vladimir Vassilevsky●October 21, 20122012-10-21
"Simon" <google@gornall.net> wrote:
>One of the chips I want to use in a project has very specific power
>requirements ...
> The VDD supply must ramp from 0V to its final value within 10ms to ensure
correct startup.
>The IO VDD supply must ramp to its final value before VDD reaches 0.4 V.
->The power supplies must be brought up monotonically
>(other stuff that's not so relevant)
>... and at the same time, I need a fair amount of power (in this case about
>5A on the 3.3v supply and about 2A on the 1V supply to > cover the
>worst-case scenarios). As far as I'm aware, there isn't a single chip
>solution that can handle this, so I'm trying to figure out > how to
>guarantee all the above.
[...]
> So, a vague thought about MOSFETs surfaced - thing is I've never used
> them, hence this long plea for help :)
You can use MOSFETs to turn the voltages on. There are many FETs with low
Rds and logic level gate drive voltage; check with IRF, Siliconix, NXP and
other usual providers. To avoid problems with huge inrush current, slow down
the gate drive by RC circuit.
Vladimir Vassilevsky
DSP and Mixed Signal Consultant
www.abvolt.com