--- In 6..., wrote:
> How... Yes, of course, there is some problem if you write a
> very very big function, larger than the page (16K). But, for
> me, this case never, never, never appends ! If this would
> append, I'd split the big function. Anyway, for me, it isn't
> a good practice to write so big functions !

Yes, I'm just pointing out that you were not answering the actual
question. They asked about having a function overlap the ppage
boundary, which you agree would not work. For my C compiler it would
not have to be a 16K+ function in order to overlap. It tries to put it
in the bank that I request. If the func is 30 bytes but only 20 bytes
available in that section, it would overlap.
> Now, with PPAGE at 0x30, of course, there are 48k of linear
> memory. With ICC12, this is the "non paged" mode, and needs
> no special attention.
>
> Joel

It is interresting to hear that ICC12 offers a "non paged" mode with
the whole filled in (using ppage 0x30). If I understand correctly, CW
does not offer that possibility, and I was disappointed. It required
use only the low and high "fixed" banks, 0x4000 and 0xc000.

How... Yes, of course, there is some problem if you write a very very big function, larger than the page (16K). But, for me, this
case never, never, never appends ! If this would append, I'd split the big function. Anyway, for me, it isn't a good practice to
write so big functions !

So what the compiler do is good for me ! It tries to put a maximum of functions in a same page, but never split function in 2 or
more pages. Of course, that means some memory lost...

One time, I had big datas (no code, but datas, I mean font characters for graphic display). But one font was smaller than the size
of a page, so, no problem too ! So I think for code, small (I say... "normal") functions always are OK. Problem if big datas.

Now, with PPAGE at 0x30, of course, there are 48k of linear memory. With ICC12, this is the "non paged" mode, and needs no special
attention.

Joel

-----Message d'origine-----
De: 6... [mailto:6...] De la part de Jefferson Smith
Envoy vendredi 1 dembre 2006 17:27
: 6...
Objet: [68HC12] Re: Need help reg PPAGE in MC9S12A256

--- In 6..., "satya" wrote:
[...]
> If current executing instruction was at the end of the page 2 of
> block 2 and next instruction to be execute was at the begining of
> page 3 of same block.
[...]

I hope that Georg and Joel are aware that their responses are
misleading. The C compilers generally are capable of generating code
to call functions and handle the PPAGE value. The problem is I know of
none that actually try to overlap a function across a PPAGE boundary.
The only way that it COULD do it is to generate instructions at the
end to jump to the next page.

On the flip side, I actually take advantage of this non-feature. Since
CPU execution is completely unaware of the PPAGE situation (i.e. the
next instruction after 0xbfff is 0xc000, regardless of PPAGE value), I
can initialize PPAGE to a fixed value (say 0x30) and use all 48K
(0x4000..0xffff) as if it were fixed ROM. The advantage is I don't
require the added overhead for managing PPAGE.

It is tricky both getting the stuff in there, and maybe debugging, but
I always seem to need less than 48K but more than 16K. I use a
combination of GCC (gnu-m68hc1x toolchain) and SRecCvt; works great.

Yahoo! Groups Links

--- In 6..., "satya" wrote:
[...]
> If current executing instruction was at the end of the page 2 of
> block 2 and next instruction to be execute was at the begining of
> page 3 of same block.
[...]

I hope that Georg and Joel are aware that their responses are
misleading. The C compilers generally are capable of generating code
to call functions and handle the PPAGE value. The problem is I know of
none that actually try to overlap a function across a PPAGE boundary.
The only way that it COULD do it is to generate instructions at the
end to jump to the next page.

On the flip side, I actually take advantage of this non-feature. Since
CPU execution is completely unaware of the PPAGE situation (i.e. the
next instruction after 0xbfff is 0xc000, regardless of PPAGE value), I
can initialize PPAGE to a fixed value (say 0x30) and use all 48K
(0x4000..0xffff) as if it were fixed ROM. The advantage is I don't
require the added overhead for managing PPAGE.

It is tricky both getting the stuff in there, and maybe debugging, but
I always seem to need less than 48K but more than 16K. I use a
combination of GCC (gnu-m68hc1x toolchain) and SRecCvt; works great.

Nope, the CPU's PC is only 16 bits. So as far as it's concerned, it's
executing the instructions say from 0x8000 to 0xBFFF when it is executing
from the 16K page window. So the last instruction in the window is at
0xBFFF or thereabout. It will just continue to execute at the next linear
address of 0xC000 or thereabout.

At 04:22 AM 11/29/2006, satya wrote:
>Hi,
>
>In my current project we are going to use Freescale MC9S12A256 16bit
>controller. It is using paging concept to access 256KByte inbuilt
>Flash with 16K address space and PPAGE register.
>
>Let us assume that my application code is more than 64KByte, stored
>in block 2 & 3 of inbuilt Flash and it is executing from FLASH(using
>page window). Becauseit is >64K, it is not only crossed the page(16K)
>boundry but also block(64K).
>
>If current executing instruction was at the end of the page 2 of
>block 2 and next instruction to be execute was at the begining of
>page 3 of same block.
>
>Question:
>Is it PPAGE value will automatically update from $36 to $37?
>If it is so, which part of the controller will do it?
>Is any reference document covered this point?
>Here i'm not performing any jump or call instructions. It may be some
>critical application code.
>
>Plz provide needful information as earliest.....
>satya

// richard (This email is for mailing lists. To reach me directly, please
use richard at imagecraft.com)

If you use Imagecraft C compiler ICC12, professional version, the PPAGE is automatically done bye the compiler... So you don't have
anything to do !

Debugger NoIce shows the correct PPAGE:address when debugging...

In my application, THE ONLY MOMENT I have to access PPAGE is when I have to access datas I forced the compiler to put in PPAGE
memory (font characters for example), so I access these datas with a function located in non paged area. Because I don't know which
function is calling me :
1) I save current PPAGE
2) I select the PPAGE where are my datas
3) I work...
4) I restore current PPAGE
5) End of the function
That means in C :
something Function (some parameters...)
{ char save_page;

save_page = PPAGE;
PPAGE = the page I want;
.../...
PPAGE = save_page;
}

So, finally, it's so easy !!!

Hope this help.

Joel
-----Message d'origine-----
De: 6... [mailto:6...] De la part de satya
Envoy mercredi 29 novembre 2006 13:22
: 6...
Objet: [68HC12] Need help reg PPAGE in MC9S12A256

Hi,

In my current project we are going to use Freescale MC9S12A256 16bit
controller. It is using paging concept to access 256KByte inbuilt
Flash with 16K address space and PPAGE register.

Let us assume that my application code is more than 64KByte, stored
in block 2 & 3 of inbuilt Flash and it is executing from FLASH(using
page window). Becauseit is >64K, it is not only crossed the page(16K)
boundry but also block(64K).

If current executing instruction was at the end of the page 2 of
block 2 and next instruction to be execute was at the begining of
page 3 of same block.

Question:
Is it PPAGE value will automatically update from $36 to $37?
If it is so, which part of the controller will do it?
Is any reference document covered this point?
Here i'm not performing any jump or call instructions. It may be some
critical application code.

Plz provide needful information as earliest.....
satya

Yahoo! Groups Links

satya wrote:

> Hi,
>
> In my current project we are going to use Freescale MC9S12A256 16bit
> controller. It is using paging concept to access 256KByte inbuilt
> Flash with 16K address space and PPAGE register.
>
> Let us assume that my application code is more than 64KByte, stored
> in block 2 & 3 of inbuilt Flash and it is executing from FLASH(using
> page window). Becauseit is >64K, it is not only crossed the page(16K)
> boundry but also block(64K).
>
> If current executing instruction was at the end of the page 2 of
> block 2 and next instruction to be execute was at the begining of
> page 3 of same block.

Bad. Tools you are using should prevent such a situation.

>
> Question:
> Is it PPAGE value will automatically update from $36 to $37?

No, it won't update from page $36 to $37. CPU will read part of instruction
from the end of page $36 and another part of instruction from nonpaged
memory at $C000, it's the most upper page $3f (valid for HCS12 derivatives).
> If it is so, which part of the controller will do it?

no

> Is any reference document covered this point?

http://www.freescale.com/files/microcontrollers/doc/ref_manual/S12CPUV2.pdf

> Here i'm not performing any jump or call instructions. It may be some
> critical application code.
>
> Plz provide needful information as earliest.....
> satya
>

Edward

>
> Yahoo! Groups Links
>

hi there,

the page switch is taken care of by the C Compiler (I assume you are
using CodeWarrior C Compiler). The *.prm file defines where your code is
to be placed. Make sure you don't place ISR code inside paged Flash.

You may want to read the "HCS12 Backend" section of the Compiler manual
(Compiler_HC12.pdf), namely "Segmentation".

Hope this helps.

regards,
Georg

________________________________

Von: 6... [mailto:6...] Im Auftrag
von satya
Gesendet: Mittwoch, 29. November 2006 13:22
An: 6...
Betreff: [68HC12] Need help reg PPAGE in MC9S12A256

Hi,

In my current project we are going to use Freescale MC9S12A256 16bit
controller. It is using paging concept to access 256KByte inbuilt
Flash with 16K address space and PPAGE register.

Let us assume that my application code is more than 64KByte, stored
in block 2 & 3 of inbuilt Flash and it is executing from FLASH(using
page window). Becauseit is >64K, it is not only crossed the page(16K)
boundry but also block(64K).

If current executing instruction was at the end of the page 2 of
block 2 and next instruction to be execute was at the begining of
page 3 of same block.

Question:
Is it PPAGE value will automatically update from $36 to $37?
If it is so, which part of the controller will do it?
Is any reference document covered this point?
Here i'm not performing any jump or call instructions. It may be some
critical application code.

Plz provide needful information as earliest.....
satya

Hi,

In my current project we are going to use Freescale MC9S12A256 16bit
controller. It is using paging concept to access 256KByte inbuilt
Flash with 16K address space and PPAGE register.

Let us assume that my application code is more than 64KByte, stored
in block 2 & 3 of inbuilt Flash and it is executing from FLASH(using
page window). Becauseit is >64K, it is not only crossed the page(16K)
boundry but also block(64K).

If current executing instruction was at the end of the page 2 of
block 2 and next instruction to be execute was at the begining of
page 3 of same block.

Question:
Is it PPAGE value will automatically update from $36 to $37?
If it is so, which part of the controller will do it?
Is any reference document covered this point?
Here i'm not performing any jump or call instructions. It may be some
critical application code.

Plz provide needful information as earliest.....
satya