"Bhanu Nagendra P." <bpisupat@cs.nospam.indiana.edu> wrote in
news:Pine.GSO.4.58.0404121818130.11505@roussette.cs.indiana.edu: 

> I am trying to port the JTAG library released with TI App. Note 149
> for use with my parallel port. I am able to reset the device and
> perform basic initialization over JTAG. However, I am having problems
> with writing to on-chip RAM. 
> It turns out that whenever I write to a
> location, the location last accessed (read or write) gets corrupted.

F123 or F44x? some chips have a JTAG bug that prevent sometimes corrupt RAM

> Any insights are greatly appreciated.

you'll have a problem anyway when you try to program flash directly as you 
cannot ensure a correct, stable, clock with a userspace program in our 
modern OS's.
you may be interested in the jtag lib from the mspgcc.sf.net projects. see 
CVS/jtag/msp430. i think it supports what you need

chris

-- 
GCC for MSP430: http://mspgcc.sf.net
Chris <cliechti@gmx.net>

I am trying to port the JTAG library released with TI App. Note 149 for
use with my parallel port. I am able to reset the device and perform basic
initialization over JTAG. However, I am having problems with writing to
on-chip RAM. It turns out that whenever I write to a location, the
location last accessed (read or write) gets corrupted. Here's an output
showing what I mean:

-------------------------------
Writing 0x5352 into 0x0252       ** this could also just be a read **
Reading back from 0x0252..
Value read = 0x5352           <----- write goes through fine

Writing 0x1312 into 0x0212        <----- second write
Now reading back from 0x0212...
Value read = 0x1312

Reading back from 0x0252..   <---- first location I accessed is corrupted
Value read = 0x16
------------------------------------

I have not changed the protocol-related code in the library in any way.

Specifically, when I clock the device with TCLK over JTAG, do memory
interactions use this clock as well? Does this impose any requirement on
my TCLK signal?
Any insights are greatly appreciated.
-Bhanu