Look at the Chrontel TV Encoders.   www.chrontel.com





"John Tan" <bktan1974@netscape.net> wrote in message
news:eb4dd21b.0401081824.1750eec1@posting.google.com...
> Hi,
>
> I'm working on using Intel PXA255 to have simultaneous LCD panel & CRT
> display capability.
>
> How do we convert the digital LCD signals to the analog RGB for CRT
> display. Namely from the PXA255 LCD controller outputs are:
>
> L_FCLK : Frame clock
> L_BIAS : AC Bias / data enable
> L_LCLK : Line clock
> L_PCLK : Pixel clock
> L_DD[15:0] : pixel_data
>
>
>
> There are dedicated EPSON graphics controller such as SD13860 that is
> abled for simultaneous LCD & CRT output, but cost is a factor, so i
> need to explore more ingenius methods.
>
> how can the HSync, VSync, R, G, B signals be derived.
>
> For the RGB signals, this is my concept on going about it. Suppose it
> is in 16-bit in 565 format.
>
> RED -- (L_DD[15:11])
> GREEN -- (LDD[10:5])
> BLUE -- (L_DD[4:0])
>
> 1. Use 8-bit (256-levels) to convert to its analog equivalent for the
> 3 signals. But who to synchronise with the HSync & VSync signals that
> are to be extracted from the digital clocks.
>
>
> For HSync & VSync, how do we correlate with the Line Clock, Frame
> Clock & Pixel clock ?
>
>
>
>
> SOme hints would be appreciated. Thanks All.
>
>
> Regards,

Hi, 

I'm working on using Intel PXA255 to have simultaneous LCD panel & CRT
display capability.

How do we convert the digital LCD signals to the analog RGB for CRT
display. Namely from the PXA255 LCD controller outputs are:

L_FCLK : Frame clock
L_BIAS : AC Bias / data enable
L_LCLK : Line clock
L_PCLK : Pixel clock
L_DD[15:0] : pixel_data



There are dedicated EPSON graphics controller such as SD13860 that is
abled for simultaneous LCD & CRT output, but cost is a factor, so i
need to explore more ingenius methods.

how can the HSync, VSync, R, G, B signals be derived.

For the RGB signals, this is my concept on going about it. Suppose it
is in 16-bit in 565 format.

RED -- (L_DD[15:11])
GREEN -- (LDD[10:5])
BLUE -- (L_DD[4:0])

1. Use 8-bit (256-levels) to convert to its analog equivalent for the
3 signals. But who to synchronise with the HSync & VSync signals that
are to be extracted from the digital clocks.


For HSync & VSync, how do we correlate with the Line Clock, Frame
Clock & Pixel clock ?




SOme hints would be appreciated. Thanks All.


Regards,