Ralph Malph wrote:

> I am looking for low cost PCB layout software.  My designs are not
> overly complex, and are on small boards, but I will be using very small
> parts and features ~0.4mm/0.016" pitch, .006"/.006" trace/space.  I have
> looked at a couple of web sites that list free software and have found
> two types of packages; the no strings attached open source packages that
> are not very mature or run on xNIX (and not windows) or the PCB fab
> house supplied packages that tie you to getting your boards from them.  

<SNIP>

Try Rimu PCB from Hutson Systems in New Zealand. Price is only $US65.
I have started (but not finished) a design with a TQFP144 Xilinx CPLD. 
It is one of the most intutitive layout packages I've tried. Eval 
version is available, but save is disabled. You can find this software at:

http://www.hutson.co.nz/rimupcb.htm


GOOD LUCK

Urb


_______________________________________________________________________________
Posted Via Uncensored-News.Com - Accounts Starting At $6.95 - http://www.uncensored-news.com
               <><><><><><><>   The Worlds Uncensored News Source   <><><><><><><><>
  

Ralph Malph <noone@yahoo.com> writes:

> Hmmm...  I am familiar with creating parts, I have created every part on
> the board.  But I don't see how that can help with this problem.  If I
> am creating a part, I can use PADs and HOLEs, I don't think VIAs are
> even available in parts.  But even if they were, how would a VIA or PAD
> inside a part be any different in terms of the solder mask?  There would
> still be the outline in the STOP layer.  As far as I can tell, there is
> no way to edit the tSTOP layer on a part.

The stop layer on vias can be adjusted in the DRC settings. There
is a general setting which gives the minimum size above which the
stop mask is created (= solder mask is not covering the pad/via). 
If this minimum is set to, say, 32 mils/thou, all vias smaller 
than 32 thou will be without stop mask (i.e. covered in the final 
design). 

Beware, this setting might possibly spoil some THD pads, if their 
diameter is smaller than the setting. I've never tested this,
and I use very few THD components, but if the system works as its
documentation claims, this may happen.

There is a way to override the setting via-by-via. However, the
override works only one way, the wrong way. It is possible to 
force the creation of the stop mask (remove the solder mask). 
There does not seem to be any way to force the removal of the 
stop mask, for some reason.

This override setting can be set in the part editor, as it is a
property (NOSTOP) of a pad, as well. But, again, it cannot be
set the other way round (i.e. to force a covered pad/via).
There may be some clever way to build a covered via by using
holes, copper rectangles, hand-drawn solder stops, etc., but
that would not be very robust.

An, as usual, Everything above is written under the strong AFAIK 
field.
 
- Ville

-- 
Ville Voipio, Dr.Tech., M.Sc. (EE)

maxfoo wrote:
> 
> In order to get the via solder masked on the bottom you'll have to create the
> via in a part library for it. read the appnote for creating libraries, pretty
> trivial really...  ftp://ftp.cadsoft.de/pub/userfiles/doc/eagapp3.zip

Hmmm...  I am familiar with creating parts, I have created every part on
the board.  But I don't see how that can help with this problem.  If I
am creating a part, I can use PADs and HOLEs, I don't think VIAs are
even available in parts.  But even if they were, how would a VIA or PAD
inside a part be any different in terms of the solder mask?  There would
still be the outline in the STOP layer.  As far as I can tell, there is
no way to edit the tSTOP layer on a part.

In order to get the via solder masked on the bottom you'll have to create the
via in a part library for it. read the appnote for creating libraries, pretty
trivial really...  ftp://ftp.cadsoft.de/pub/userfiles/doc/eagapp3.zip

On Sun, 04 Jan 2004 01:57:42 -0500, Ralph Malph <noone@yahoo.com> wrote:

>Ben Jackson wrote:
>> 
>> In article <3FF63364.2268660D@yahoo.com>, Ralph Malph  <noone@yahoo.com> wrote:
>> >I also need to provide as much ground
>> >plane as possible to help spread the heat to use what little board area
>> >there is.  So I am having to learn how to cover areas of the board with
>> >copper fill.  In fact that is where I am currently stuck.
>> 
>> You have to make polygons in the board layers.  You could change the
>> trace widths of the net classes but that will apply everywhere, not just
>> where there's extra space.  As of the latest version the autorouter seems
>> smart enough to avoid manually placed items in the copper planes (eg as
>> a test I re-routed a board that already had some text).  The README even
>> claimed you could assign these things to nets and have them used properly.
>
>Thanks for the advice.  My problem is not the basic issue of making a
>copper area.  But I have a part with a heat sink pad on the bottom which
>needs to be soldered to a plane like a very large SMD.  I was able to
>add that.  This plane needs to be as large as possible so it needs to
>fill the open areas.  I also figured that out.  But there need to be
>vias to a similar area on the bottom of the board and these vias need to
>not be exposed, rather then need to have solder mask over them.  That is
>what I can't figure out.  When I add a via, it connects ok and in the
>SMD area it works just fine.  But on the back of the board and in the
>non-pad area, I can't figure out how to get the via to not show in the
>solder mask plane.  It appears that the solder mask is made from the
>VIAs/PADs/SMDs based on the rules I provide.  I can't find a way to turn
>this off for specific vias.  
>
>I posted this question to the support newsgroup, but it seems there is
>not much activity there over the weekend.  :)  I'll see if I get an
>answer Monday.  
>
>Once I get this resolved, I think my next lesson will be in generating
>the outputs for getting the board made.


Remove "HeadFromButt", before replying by email.

Ralph Malph wrote:
> Leon Heller wrote:
> 
>>Ville Voipio wrote:
>>
>>>Leon Heller <aqzf13@dsl.pipex.com> writes:
>>>
>>>
>>>
>>>>EasyPC is *very* much easier to use than Eagle (it's a proper Windows
>>>>application), has fewer bugs and is cheaper.
>>>
>>>
>>>I've been using Eagle for several medium-complexity designs
>>>(two layers, TQFP/MLF chips, around 100 components), and have
>>>not found many bugs. There were some GUI crashes (not data-corrupting)
>>>in earlier versions, but haven't seen them in 4.11.
>>>
>>>Eagle is not perfect. But it seems that it gets most jobs done.
>>>There are a few complaints I have:
>>>
>>>- making new components is clumsy, as copy&pasting from
>>>  one library to another requires opening the libraries several
>>>  times. Separating the component layouts and symbols to different
>>>  places would simplify the process significantly.
>>
>>Very easy and intuitive in EasyPC and Pulsonix.
>>
>>
>>>- the cut&paste method works is different from the "standard"
>>>  cut&paste.
>>
>>Very easy and intuitive in EasyPC and Pulsonix.
>>
>>
>>>- only the vector font can be used on silkscreen layers. Not a
>>>  very beautiful one.
>>
>>EasyPC and Pulsonix can use any Windows fonts.
>>
>>
>>>- the tutorial is not a good one. Most of the learning process
>>>  needs to be done through trial and error, especially with
>>>  libraries.
>>
>>EasyPC and Pulsonix are so easy to use that a tutorial isn't really needed.
> 
> 
> That would all be great if I knew that the entire program was easy to
> use and to do all the things I need.  But their eval program is useless
> for doing even the simplest job or even for evaluation since you can't
> save any work.  That means you have to start from scratch every time you
> run the program.  I have tried to evaluate similar tools before and
> found this limitation to be impossible to work with, not to mention that
> I would have to take time away from real work to evaluate the tool.  At
> least with Eagle I can get work done while I learn the tool.  I think
> they have an *excellent* evaluation process even if the tool is not easy
> to learn.  This way I can see for myself just how easy or hard it is to
> use.  With EasyPC I have to take the word of others.

The Pulsonix demo (100 pins limit) lets you save files. Pulsonix will 
give you a month's unlimited evaluation if you ask them nicely.

Leon
-- 
Leon Heller, G1HSM
Email: aqzf13@dsl.pipex.com
My low-cost Philips LPC210x ARM development system:
http://www.geocities.com/leon_heller/lpc2104.html

Ben Jackson wrote:
> 
> In article <3FF63364.2268660D@yahoo.com>, Ralph Malph  <noone@yahoo.com> wrote:
> >I also need to provide as much ground
> >plane as possible to help spread the heat to use what little board area
> >there is.  So I am having to learn how to cover areas of the board with
> >copper fill.  In fact that is where I am currently stuck.
> 
> You have to make polygons in the board layers.  You could change the
> trace widths of the net classes but that will apply everywhere, not just
> where there's extra space.  As of the latest version the autorouter seems
> smart enough to avoid manually placed items in the copper planes (eg as
> a test I re-routed a board that already had some text).  The README even
> claimed you could assign these things to nets and have them used properly.

Thanks for the advice.  My problem is not the basic issue of making a
copper area.  But I have a part with a heat sink pad on the bottom which
needs to be soldered to a plane like a very large SMD.  I was able to
add that.  This plane needs to be as large as possible so it needs to
fill the open areas.  I also figured that out.  But there need to be
vias to a similar area on the bottom of the board and these vias need to
not be exposed, rather then need to have solder mask over them.  That is
what I can't figure out.  When I add a via, it connects ok and in the
SMD area it works just fine.  But on the back of the board and in the
non-pad area, I can't figure out how to get the via to not show in the
solder mask plane.  It appears that the solder mask is made from the
VIAs/PADs/SMDs based on the rules I provide.  I can't find a way to turn
this off for specific vias.  

I posted this question to the support newsgroup, but it seems there is
not much activity there over the weekend.  :)  I'll see if I get an
answer Monday.  

Once I get this resolved, I think my next lesson will be in generating
the outputs for getting the board made.

Leon Heller wrote:
> 
> Ville Voipio wrote:
> > Leon Heller <aqzf13@dsl.pipex.com> writes:
> >
> >
> >>EasyPC is *very* much easier to use than Eagle (it's a proper Windows
> >>application), has fewer bugs and is cheaper.
> >
> >
> > I've been using Eagle for several medium-complexity designs
> > (two layers, TQFP/MLF chips, around 100 components), and have
> > not found many bugs. There were some GUI crashes (not data-corrupting)
> > in earlier versions, but haven't seen them in 4.11.
> >
> > Eagle is not perfect. But it seems that it gets most jobs done.
> > There are a few complaints I have:
> >
> > - making new components is clumsy, as copy&pasting from
> >   one library to another requires opening the libraries several
> >   times. Separating the component layouts and symbols to different
> >   places would simplify the process significantly.
> 
> Very easy and intuitive in EasyPC and Pulsonix.
> 
> >
> > - the cut&paste method works is different from the "standard"
> >   cut&paste.
> 
> Very easy and intuitive in EasyPC and Pulsonix.
> 
> >
> > - only the vector font can be used on silkscreen layers. Not a
> >   very beautiful one.
> 
> EasyPC and Pulsonix can use any Windows fonts.
> 
> >
> > - the tutorial is not a good one. Most of the learning process
> >   needs to be done through trial and error, especially with
> >   libraries.
> 
> EasyPC and Pulsonix are so easy to use that a tutorial isn't really needed.

That would all be great if I knew that the entire program was easy to
use and to do all the things I need.  But their eval program is useless
for doing even the simplest job or even for evaluation since you can't
save any work.  That means you have to start from scratch every time you
run the program.  I have tried to evaluate similar tools before and
found this limitation to be impossible to work with, not to mention that
I would have to take time away from real work to evaluate the tool.  At
least with Eagle I can get work done while I learn the tool.  I think
they have an *excellent* evaluation process even if the tool is not easy
to learn.  This way I can see for myself just how easy or hard it is to
use.  With EasyPC I have to take the word of others.

In article <3FF63364.2268660D@yahoo.com>, Ralph Malph  <noone@yahoo.com> wrote:
>I also need to provide as much ground
>plane as possible to help spread the heat to use what little board area
>there is.  So I am having to learn how to cover areas of the board with
>copper fill.  In fact that is where I am currently stuck.  

You have to make polygons in the board layers.  You could change the
trace widths of the net classes but that will apply everywhere, not just
where there's extra space.  As of the latest version the autorouter seems
smart enough to avoid manually placed items in the copper planes (eg as
a test I re-routed a board that already had some text).  The README even
claimed you could assign these things to nets and have them used properly.

-- 
Ben Jackson
<ben@ben.com>
http://www.ben.com/

On Fri, 02 Jan 2004 22:13:40 -0500, Ralph Malph <noone@yahoo.com>
wrote:

>I just wanted to let people know where I ended up.  As I posted before,
>many of these packages are limited enough that I was not going to spend
>time to evaluate them without being able to do useful work.  So the only
>package I actually tried is Eagle from Cadsoft.  I am finding that it is
>very hard to learn, at least compared to what I expected.  I can
>normally pick up tools very easily, but I find Eagle to be very, very
>counter intuitive and the "tutorial" is very limited.  
>
>On the other hand, I have been getting some work done with this tool.  I
>am finding that even though this is a very tiny board (.5" x .6")
>perhaps this was not such a simple task.  The board is double sided with
>a very high component density.  I also need to provide as much ground
>plane as possible to help spread the heat to use what little board area
>there is.  So I am having to learn how to cover areas of the board with
>copper fill.  In fact that is where I am currently stuck.  
>
>The support newsgroups for this tool seem pretty good.  One actually has
>Cadsoft people posting.  So by reading what others have had trouble with
>and using a lot of patience, I expect I will get this design done after
>a while.  
>
>Thanks to all who posted.  If anyone knows of a tool that is more
>intuative, please let me know.  Since board layout will be an occasional
>task for me, I expect I will have to relearn some of the tricker aspects
>of Eagle every time I use it.  :)

Ralph,
I tried to email you but it bounced. Please contact me at:
ahorne1 AT comcast dot net.  Or call me at (909) 461-8373.  I can help
you with Eagle.  I was a beta tester for the OS2 version.

Ville Voipio wrote:
> Leon Heller <aqzf13@dsl.pipex.com> writes:
> 
> 
>>EasyPC is *very* much easier to use than Eagle (it's a proper Windows
>>application), has fewer bugs and is cheaper.
> 
> 
> I've been using Eagle for several medium-complexity designs
> (two layers, TQFP/MLF chips, around 100 components), and have
> not found many bugs. There were some GUI crashes (not data-corrupting)
> in earlier versions, but haven't seen them in 4.11.
> 
> Eagle is not perfect. But it seems that it gets most jobs done.
> There are a few complaints I have:
> 
> - making new components is clumsy, as copy&pasting from
>   one library to another requires opening the libraries several
>   times. Separating the component layouts and symbols to different
>   places would simplify the process significantly.

Very easy and intuitive in EasyPC and Pulsonix.

> 
> - the cut&paste method works is different from the "standard"
>   cut&paste.


Very easy and intuitive in EasyPC and Pulsonix.

> 
> - only the vector font can be used on silkscreen layers. Not a
>   very beautiful one.

EasyPC and Pulsonix can use any Windows fonts.

> 
> - the tutorial is not a good one. Most of the learning process
>   needs to be done through trial and error, especially with
>   libraries.

EasyPC and Pulsonix are so easy to use that a tutorial isn't really needed.

Leon
-- 
Leon Heller, G1HSM
Email: aqzf13@dsl.pipex.com
My low-cost Philips LPC210x ARM development system:
http://www.geocities.com/leon_heller/lpc2104.html