Hi friends,
I have posted this problem in KEIL forum and AT91 Forum.
Nobody is giving a solution for this problem.
If anybody have sample code means please give it to me.
Controller=AT91SAM7SE512
TOOL= KEIL uVision 3.53
Please help me to solve this problem.
With regards,
Murthy.R
nanj moorthy wrote: Hi Jon,
Thanks for your reply.
I have given this ACK in the ISR.But still it is not working.
This is my UART0 Initialization code,is there i have to do any changes,
because when i Enable the IT the code is not working.
for your reference,
void uart0Init(void)
{
// enable the clock of UART0
AT91C_BASE_PMC->PMC_PCER = (1<
// enable uart pins on PIO
*AT91C_PIOA_PDR = AT91C_PA5_RXD0 | AT91C_PA6_TXD0;
// select peripheral connection
*AT91C_PIOA_ASR = AT91C_PA5_RXD0 | AT91C_PA6_TXD0;
// disable I/O pullup
*AT91C_PIOA_PPUDR = AT91C_PA5_RXD0;
// reset the UART
AT91C_BASE_US0->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS
|AT91C_US_TXDIS;
// set serial line mode
AT91C_BASE_US0->US_MR = AT91C_US_ASYNC_MODE;
// set the baud rate
AT91C_BASE_US0->US_BRGR = BAUD_VALUE(9600);
// enable the uart
AT91C_BASE_US0->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
// enable reaction on different interrupt sources
AT91C_BASE_US0->US_IDR = 0xFFFFFFFF;
AT91C_BASE_US0->US_IER = AT91C_US_RXRDY;
// configure USART0 interrupt
AT91C_BASE_AIC->AIC_IDCR = 0x1 << AT91C_ID_US0;
AT91C_BASE_AIC->AIC_SVR[AT91C_ID_US0] = (unsigned long) Usart0Int;
AT91C_BASE_AIC->AIC_SMR[AT91C_ID_US0] =
AT91C_AIC_SRCTYPE_HIGH_LEVEL |2;
AT91C_BASE_AIC->AIC_IECR = 0x1 << AT91C_ID_US0;
}
Is this code Right?
Please check this and advise me on this.
Please.................
With regards,
Murthy.R
willoughby_jon wrote:
If you set a break point in the ISR does it ever get
there?
If not, check IRQ vector (0x18) has the following code:
ldr pc,[pc,#-0xF20]
The AIC manages the prioritization by using an internal stack on which
the current interrupt level is automatically pushed when AIC_IVR is
read, and popped when AIC_EOICR is written (any value), so
AT91C_BASE_AIC->AIC_EOICR = AT91C_BASE_US0->US_CSR;
and
*AT91C_AIC_EOICR = 0;
acknowledges twice at the end of your ISR. I think using
AT91C_BASE_AIC->AIC_EOICR = 0;
would be fine...
Jon
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