Reply by hexapodian September 25, 20032003-09-25
Is it possible, that the MCFLG register has to be read to avoid
triggering the interrupt simultaniously ?

Thx, Hex

--- In , "Mike Elphick" <mike.elphick@d...> wrote:
> Thx of hexapodian!
>
> I am not experienced with the modulus down counter, but there is an
obvious mistake in the last line of your program.
>
> First you are setting the appropriate bits in the MCCTL register,
and then you are changing some of them with decimal 1000.
> BTW your assembler should have issued a warning as MOVB will only
move an 8-bit value and the #1000 will have been
> shortened to #232 or %11101000, which is different from your desired
setting of %10000111 deduced from the first
> five lines of code.
>
> Michael Elphick
> (mike.elphick@d...)
> ----- Original Message -----
> From: hexapodian
> To:
> Sent: Tuesday, September 23, 2003 12:27 PM
> Subject: [68HC12] Modulus down counter > Hi,
> i'm using an MC9S12D64 at 8MHz. There are some problems to trigger a
> subroutine using the modulus down counter in modulus mode.
> The code looks like:
>
> BSET MCCTL, #MODMC ; modulus
> BSET MCCTL, #MCPR0 ; prescaler
> BSET MCCTL, #MCPR1 ; =8 => count every 1 micro sec
> BSET MCCTL, #MCCI ; enable underflow interrupt
> BSET MCCTL, #MCEN ; enable counter
> MOVB #1000, MCCTL ; underflow every 1ms
>
> The called subroutine executes a RTI at the end. I don't notice calls
> every 1ms, instead there are calls very ofter (5us).
> I tried to change the order of the instructions, but that did not
help.
> Does anyone has an idea ?
>
> Thx, hexapodian
>
> PS: sorry for my bad english. >
> -------------------- >
> >
>




Reply by hexapodian September 24, 20032003-09-24
Hi Michael,

line 6 is a typo. I should be:
MOVB #1000, MCCNT ; underflow every 1ms

This #1000 will be interpreted by the assembler as decimal. Normally i
would prefer to set all needed bits in MCCTL with one MOVB but that
can't be debugged easily.

hexapodian

--- In , "Mike Elphick" <mike.elphick@d...> wrote:
> Thx of hexapodian!
>
> I am not experienced with the modulus down counter, but there is an
obvious mistake in the last line of your program.
>
> First you are setting the appropriate bits in the MCCTL register,
and then you are changing some of them with decimal 1000.
> BTW your assembler should have issued a warning as MOVB will only
move an 8-bit value and the #1000 will have been
> shortened to #232 or %11101000, which is different from your desired
setting of %10000111 deduced from the first
> five lines of code.
>
> Michael Elphick
> (mike.elphick@d...)
> ----- Original Message -----
> From: hexapodian
> To:
> Sent: Tuesday, September 23, 2003 12:27 PM
> Subject: [68HC12] Modulus down counter > Hi,
> i'm using an MC9S12D64 at 8MHz. There are some problems to trigger a
> subroutine using the modulus down counter in modulus mode.
> The code looks like:
>
> BSET MCCTL, #MODMC ; modulus
> BSET MCCTL, #MCPR0 ; prescaler
> BSET MCCTL, #MCPR1 ; =8 => count every 1 micro sec
> BSET MCCTL, #MCCI ; enable underflow interrupt
> BSET MCCTL, #MCEN ; enable counter
> MOVB #1000, MCCTL ; underflow every 1ms
>
> The called subroutine executes a RTI at the end. I don't notice calls
> every 1ms, instead there are calls very ofter (5us).
> I tried to change the order of the instructions, but that did not
help.
> Does anyone has an idea ?
>
> Thx, hexapodian
>
> PS: sorry for my bad english. >
> -------------------- >
> >
>




Reply by Mike Elphick September 23, 20032003-09-23
Thx of hexapodian!

I am not experienced with the modulus down counter, but there is an obvious mistake in the last line of your program.

First you are setting the appropriate bits in the MCCTL register, and then you are changing some of them with decimal 1000.
BTW your assembler should have issued a warning as MOVB will only move an 8-bit value and the #1000 will have been
shortened to #232 or %11101000, which is different from your desired setting of %10000111 deduced from the first
five lines of code.

Michael Elphick
()
----- Original Message -----
From: hexapodian
To:
Sent: Tuesday, September 23, 2003 12:27 PM
Subject: [68HC12] Modulus down counter Hi,
i'm using an MC9S12D64 at 8MHz. There are some problems to trigger a
subroutine using the modulus down counter in modulus mode.
The code looks like:

BSET MCCTL, #MODMC ; modulus
BSET MCCTL, #MCPR0 ; prescaler
BSET MCCTL, #MCPR1 ; =8 => count every 1 micro sec
BSET MCCTL, #MCCI ; enable underflow interrupt
BSET MCCTL, #MCEN ; enable counter
MOVB #1000, MCCTL ; underflow every 1ms

The called subroutine executes a RTI at the end. I don't notice calls
every 1ms, instead there are calls very ofter (5us).
I tried to change the order of the instructions, but that did not help.
Does anyone has an idea ?

Thx, hexapodian

PS: sorry for my bad english.
--------------------




Reply by hexapodian September 23, 20032003-09-23
Hi,
i'm using an MC9S12D64 at 8MHz. There are some problems to trigger a
subroutine using the modulus down counter in modulus mode.
The code looks like:

BSET MCCTL, #MODMC ; modulus
BSET MCCTL, #MCPR0 ; prescaler
BSET MCCTL, #MCPR1 ; =8 => count every 1 micro sec
BSET MCCTL, #MCCI ; enable underflow interrupt
BSET MCCTL, #MCEN ; enable counter
MOVB #1000, MCCTL ; underflow every 1ms

The called subroutine executes a RTI at the end. I don't notice calls
every 1ms, instead there are calls very ofter (5us).
I tried to change the order of the instructions, but that did not help.
Does anyone has an idea ?

Thx, hexapodian

PS: sorry for my bad english.



Reply by William R. Elliot April 11, 20032003-04-11
Thanks for the various responses to the timing problem posted the other
day. I rotated two instructions and things started working properly.

The ECT block guide indicates that "If Modulus mode is enabled (MODMC=1), a
write to this address [MCCNT] will update the load register with the value
written to it." In the earlier code, I set MODMC to 1 and the next line
wrote the 6000 value to MCCNT, and then I enabled the down counter (Bit
MCEN in MCCTL).

In the code that works I just moved the MCEN enable to come between the
MODMC=1 and the load of 6000 into MCCNT. This provides me with a 1ms
interrupt rate which is what I was trying to get to.

The interrupt code itself does not manipulate any of the counter registers,
only static variables for various time units.

Thanks,

Bill


Reply by zathra_70 April 10, 20032003-04-10
Bill,

What exactly are you doing inside the interrupt?
Your idea is 100%, but maybe the code is not quite right.
If you accidently cycle MCEN or MODM, the effect would be 65535.
counts. Look at all writes that might touch these inside the ISR- they
should not be changed once set up.

Post the exact code (assembly output) if you can't sort it out.

-zathra --- In , "William R. Elliot" <bill@w...> wrote:
> Hello all. I am using the 9S12A256B part and setting up the modulus
down
> counter to provide regular interrupts. The rate of the interrupt
seems to
> be off by a factor of 10 and I am not sure where the error is.
>
> Using the ECT_16B8C Block User Guide V01.02 as a reference here is
how I
> have it set up to provide an underflow every millisecond:
>
> I am running the part with a bus clock of 24MHz.
> The prescale bits are 01 for a divide by four. (MCCTL_MCPR)
> The modulus mode is enabled. (MCCTL_MODMC)
> The loaded modulus value is 6000. (MCCNT)
> The counter is enabled. (MCCTL_MCEN)
> The interrupt is enabled. (MCCTL_MCZI)
>
> 24MHz divided by four is 6MHz with a time equivalent of 166ns per
counter tick.
> 166ns times 6000 is 1ms (or reasonably close).
>
> The actual interrupt rate appears to be about every 10ms. What am I
missing?
>
> Thanks for any help.
>
> Bill




Reply by Kellogg Dave April 10, 20032003-04-10
Hi Bill-

I notice that 0.166 usec * 65536 = 10.878 msec. Hmm... 607-656-2597 -----Original Message-----
From: William R. Elliot [mailto:]
Sent: Wednesday, April 09, 2003 6:46 PM
To:
Subject: [68HC12] Modulus down counter Hello all. I am using the 9S12A256B part and setting up the modulus down
counter to provide regular interrupts. The rate of the interrupt seems to
be off by a factor of 10 and I am not sure where the error is.

Using the ECT_16B8C Block User Guide V01.02 as a reference here is how I
have it set up to provide an underflow every millisecond:

I am running the part with a bus clock of 24MHz.
The prescale bits are 01 for a divide by four. (MCCTL_MCPR)
The modulus mode is enabled. (MCCTL_MODMC)
The loaded modulus value is 6000. (MCCNT)
The counter is enabled. (MCCTL_MCEN)
The interrupt is enabled. (MCCTL_MCZI)

24MHz divided by four is 6MHz with a time equivalent of 166ns per counter
tick. 166ns times 6000 is 1ms (or reasonably close).

The actual interrupt rate appears to be about every 10ms. What am I
missing?

Thanks for any help.

Bill ------------------------ Yahoo! Groups Sponsor ---------------------~--> Get
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Reply by HINO Naoya April 9, 20032003-04-09
Hi Bill.

I think the problem is that you do not update
timer compare register.

In my case this code works well.
2.5 ms interrupt at 5 MHz cristal.

In your case may be 65536 * 166 ns = 10.8789 ms
isn't it? TIMER MOVB #_C4F,TFLG1 ; clear output compare channel-4 flag
LDD TC4 ; timer-4 OutputCompare register
ADDD #6144 ; 6144 = 2.5 * 2457.600
STD TC4 ; restore
.
.
.
RTI Regards.

--
_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/
Nohken INC. R&D
senior software engineer Naoya L. Hino
e-mail
Tel. +81 6-6386-8327
Fax. +81 6-6386-6178
_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/


Reply by William R. Elliot April 9, 20032003-04-09
Hello all. I am using the 9S12A256B part and setting up the modulus down
counter to provide regular interrupts. The rate of the interrupt seems to
be off by a factor of 10 and I am not sure where the error is.

Using the ECT_16B8C Block User Guide V01.02 as a reference here is how I
have it set up to provide an underflow every millisecond:

I am running the part with a bus clock of 24MHz.
The prescale bits are 01 for a divide by four. (MCCTL_MCPR)
The modulus mode is enabled. (MCCTL_MODMC)
The loaded modulus value is 6000. (MCCNT)
The counter is enabled. (MCCTL_MCEN)
The interrupt is enabled. (MCCTL_MCZI)

24MHz divided by four is 6MHz with a time equivalent of 166ns per counter tick.
166ns times 6000 is 1ms (or reasonably close).

The actual interrupt rate appears to be about every 10ms. What am I missing?

Thanks for any help.

Bill