Antonio,

Thanks for the link.  I downloaded the datasheet and it looks like we
could use it but we only need one USB 2.0 port and this part has three
(3) ports so it would definitely be overkill.  Also, understandably,
the part is large (128 pins) and we are trying to conserve as much
power and PCB space as we call.

If I remember right, I believe the ISP1761 only has one port but isn't
available to the general public yet.  I'll keep looking.  Thanks for
your help.

Brad.

Brad,

> We are need of a component that can act as a high speed USB 2.0 host.
> This component does not have to be OTG compliant, but it would be
> preferred.
>
> Attached is the datasheet for the ISP1761.  Samples for this part will
> be available Q1 05.
> Regards,
> Chris L

If you don't need OTG but just HS host, you can use also ISP1760.
You can download datasheet here: 
http://www.semiconductors.philips.com/pip/ISP1760BE.html.

The part is marked "Full production", but I don't know if it's true or not. 
Tomorrow I'll give them a call.

avrbasic wrote:
> "Brad S" <bjskill@rocketmail.com> wrote in message
> news:1104423466.699235.13340@c13g2000cwb.googlegroups.com...
> >
> [snip]
> > Antti -
> >
> > Approximately how many FPGA gates would the USB 3300 IP core
solution
> > consume?  Also, when this IP core is inserted and compiled for the
FPGA
> > what  clock speeds will be required in order to reduce the
possibility
> > of internal timing problems?
> >
> > We have an FPGA available that will be used for several other
functions
> > but it's currently unclear how many gates will be available for
this IP
> > core or any other additional functions.
> >
> > Brad S.
>
> usb3300 is an ULPI PHY (similar to ISP1504) not ip-core.
> I have not seen any real small USB OTG IP Core solutions, and I also
have
> never synthesised usb ip-cores as standalone only as part of FPGA
softcore
> SoC system.
>
> my thumb guess would be that if your FPGA is S3-1500 or anything
similar
> then you might have enough resources overleft. A 32 bit softcore RISC
> (microblaze) + some bus peripherals + hs usb ip core takes more than
60% of
> V2-1000. Thats my best estimates if those would help you. I dont
think there
> is any usbhs otg ipcore really optimized for FPGA so its not yet cost
> effective option. For ASICs the gate-cost is smaller so its not such
an
> issue.
>
> Antti
> news:openchip.org

Antti -

Thanks for the estimates.  I didn't realize that the usb3300 was the
ULPI PHY and had nothing to do with the ip-core.  Thanks for the
clarification.

It sounds like an FPGA-based solution isn't a cost-effective solution
at this time.  Developing an ASIC is not an option for us, so we will
have to stay with any commercial USB hosting devices that become
available in the near term.

Brad.

"Brad S" <bjskill@rocketmail.com> wrote in message
news:1104423466.699235.13340@c13g2000cwb.googlegroups.com...
>
[snip]
> Antti -
>
> Approximately how many FPGA gates would the USB 3300 IP core solution
> consume?  Also, when this IP core is inserted and compiled for the FPGA
> what  clock speeds will be required in order to reduce the possibility
> of internal timing problems?
>
> We have an FPGA available that will be used for several other functions
> but it's currently unclear how many gates will be available for this IP
> core or any other additional functions.
>
> Brad S.

usb3300 is an ULPI PHY (similar to ISP1504) not ip-core.
I have not seen any real small USB OTG IP Core solutions, and I also have
never synthesised usb ip-cores as standalone only as part of FPGA softcore
SoC system.

my thumb guess would be that if your FPGA is S3-1500 or anything similar
then you might have enough resources overleft. A 32 bit softcore RISC
(microblaze) + some bus peripherals + hs usb ip core takes more than 60% of
V2-1000. Thats my best estimates if those would help you. I dont think there
is any usbhs otg ipcore really optimized for FPGA so its not yet cost
effective option. For ASICs the gate-cost is smaller so its not such an
issue.

Antti
news:openchip.org

avrbasic wrote:
> "Brad S" <bjskill@rocketmail.com> wrote in message
> news:1103403659.821811.123940@c13g2000cwb.googlegroups.com...
> > Hi,
> >
> > I'm searching for a chip that operates to the high speed USB 2.0
> > On-The-Go (OTG) standard.  We currently use the Cypress FX2
(CY7C68013)
>
> One option could be philips isp1504 or SMSC usb3300 + otg ip-core in
low
> cost FPGA, that is at least working and available solution (I have
tested
> both PHY's). Of course the relative price of the FPGA fabric for the
HS OTG
> core is still relativly high.
>
> Antti Lukats

Antti -

Approximately how many FPGA gates would the USB 3300 IP core solution
consume?  Also, when this IP core is inserted and compiled for the FPGA
what  clock speeds will be required in order to reduce the possibility
of internal timing problems?

We have an FPGA available that will be used for several other functions
but it's currently unclear how many gates will be available for this IP
core or any other additional functions.

Brad S.

"RobJ" <rsefton@abc.net> wrote in message
news:33g8vcF40b44eU1@individual.net...
> avrbasic wrote:
> >
> > One option could be philips isp1504 or SMSC usb3300 + otg ip-core in
> > low cost FPGA, that is at least working and available solution (I
> > have tested both PHY's). Of course the relative price of the FPGA
> > fabric for the HS OTG core is still relativly high.
> >
> > Antti Lukats
>
> Antti -
>
> Did you have to sign an NDA to get the 1504 parts and documentation? Are
> those parts generally available or just sampling?
>
> Also, do you know of a HS OTG core with the ULPI interface or did you map
> UTMI <-> ULPI yourself?
>
> Thanks,
> Rob

Yes, it seems that all detailed ULPI information is at the moment only
available under NDA. I think ISP1504 generic availability should be just
"know" but I have actually not made any inquires for production.

Philips is providing a UTMI - ULPI wrapper but it is not necessary to use it
:)

Antti

avrbasic wrote:
>
> One option could be philips isp1504 or SMSC usb3300 + otg ip-core in
> low cost FPGA, that is at least working and available solution (I
> have tested both PHY's). Of course the relative price of the FPGA
> fabric for the HS OTG core is still relativly high.
>
> Antti Lukats

Antti -

Did you have to sign an NDA to get the 1504 parts and documentation? Are 
those parts generally available or just sampling?

Also, do you know of a HS OTG core with the ULPI interface or did you map 
UTMI <-> ULPI yourself?

Thanks,
Rob 

"Brad S" <bjskill@rocketmail.com> wrote in message
news:1103403659.821811.123940@c13g2000cwb.googlegroups.com...
> Hi,
>
> I'm searching for a chip that operates to the high speed USB 2.0
> On-The-Go (OTG) standard.  We currently use the Cypress FX2 (CY7C68013)

One option could be philips isp1504 or SMSC usb3300 + otg ip-core in low
cost FPGA, that is at least working and available solution (I have tested
both PHY's). Of course the relative price of the FPGA fabric for the HS OTG
core is still relativly high.

Antti Lukats

"Brad S" <bjskill@rocketmail.com> wrote in message 
news:1103729566.217466.205000@f14g2000cwb.googlegroups.com...
> Over the past four years we have used two different USB slave
> components from Cypress/Anchor Chips: AN2135 (USB 1.1) and CY7C68013 -
> FX2 (USB 2.0).  During the development cycles we never even attempted
> making phone calls and the e-mail technical support from Cypress was
> hit or miss.  Sometimes they were able to quickly provide a response
> that answered the question.  Other times it took several exhanges of
> e-mail's to describe the problem in great detail before they would
> answer the question.  This process was very frustrating and time
> consuming.  On one ocassion, we answered our own question by performing
> a series of tests that should have been unnecessary.
>
> We did look into using the Net2270 from NetChip.  We even bought their
> evaluation board.  It wasn't chosen because it would have required more
> embedded software to support it than the FX2 did.  Our embedded host
> processor was an Intel StrongARM running a Linux OS.  The slave FIFO
> mode on the FX2 was perfect for our application.  Except for the one
> major issue that we resolved ourselves, the FX2 worked fine for our
> application.
>
> Did you ever consider using an FX2 or similiar part instead of the SX2
> for your application?  Or was the FX2 overkill since you didn't need a
> USB slave device 8051-based core?  When we were in the research phase
> of our design, the SX2 was not available for consideration.  I would be
> curious to know what other problems you had when you had when using the
> SX2.
>
> Brad

We looked at the FX2, for our device it was extreme overkill.  Actually, the 
SX2 is an FX2 with teh ROM masked for that specific subset of functions that 
define an SX2.  Again, had Cypress simply told us THAT - our lives would 
have been much easier.  They also neglected to tell us that we were the 1st 
product to go to production with the SX2.  That little bit of info would 
have been very enlightening as well.

At best they are hit & miss with technical support.

The SX2 (& FX2 I believe) have no means by themselves to sense an attach / 
detach.  Most other devices have the ability to detect USB power.  In the 
Cypress solution that has to be added manually.  Of course the host will see 
the device, but the device will need to have external hardware to detect 
that event if necessary.  Other issues - general immaturity of the Cypress 
low-level software.  I also recall there was a bug in the mask of the SX2 
requiring a lot of push-ups from us to get it work properly.  There were 
other issues with the SX2 that required us to go to a second plug-fest to 
gain certification.

I would guess the part is stable enough for new development at this point. 
It was ugly when we went through it.  Again, most of those hard feelings 
would have been resolved had Cypress been forthcoming with us as to the 
state of the device at that time.  I have no issues designing with Beta or 
even Alpha hardware - provided I KNOW that's what I'm dealing with and have 
some responsive linkages to the factory.

Glen 

"RobJ" <rsefton@abc.net> wrote in message 
news:32u5h8F3pp03nU1@individual.net...
> Glen Atkins wrote:
>>
>> Our high-end product uses a NetChip (now Plexus) 2280 and is
>
> PLX, not Plexus.
>
> Rob

Yeah, that's right - must have been on Holiday time there.  Thanks Rob.