Reply by samiehg January 11, 20082008-01-11
I am using the SSP module for TI Synch Serial frame format. Each frame
size is 16-bits.

For rx interrupts, the user manual suggests that RXIM in SSP1MSC
register is to trigger an interrupt when the Rx fifo is at least half
full. It is my understanding that in this way, I will get an interrupt
when I have received FOUR 16-bit words.

However, I have noticed the interrupt flag RXMIS getting set even if I
have received
only ONE word.

Any idea why this could be happening?

PS This is the code I am using in my ISR:

if ( SSP1MIS & 0x04 )
// Read all data in the fifo
while ( (SSP1SR & SSPSR_RNE) && (Number_Of_Words_To_Rx_On_SSP1) )
Number_Of_Words_To_Rx_On_SSP1 --;
Number_Of_Words_Rxd_On_SSP1 ++;

An Engineer's Guide to the LPC2100 Series