"Haldo" <haldo@somewhere.net> wrote in message 
news:dadksg$plk$1@newsfeed.cineca.it...
>
>
> Thomas Magma wrote:
>
>> No, the write speed of flash memory is not the limit of the write speed 
>> of CompactFlash cards. Yes, each bit/byte of Flash has a write cycle 
>> limit, however it is possible to store incoming data to a FIFO buffer 
>> then mux it out to parallel channels of FIFO's that feed the multiple 
>> sections of Flash. Then there is no write cycle limit, and the limit then 
>> falls back to the port speed.
>>
>
> Sure. You can buffer.
> But if you act this way you cannot "sustain" this speed, can you?
> Can you write 66MB/sec continously to the flash? Unless you get a FIFO or 
> a SRAM buffer of the same size.... :-)
>
> IMHO sustained write speed are at present more or less 10MB/sec (according 
> to cf makers). Maybe I'm not up to date.
>
> I was investigating on the limit for streaming continous data to a compact 
> flash (or sd/mmc) device.
>
> Bye, have a nice day!
> Aldo
>

Typically in a CompactFlash you have a controller and a Flash chip. Say for 
instance you replaced the Flash chip with a multiplexer, and two Flash chips 
side-by-side. The multiplexer delivers a byte of data to one Flash and then 
the next byte of data to the other Flash (a D-latch holding the data at each 
Flash). You've now doubled the write speed of the card. Now try it with 4, 
8, 16 (ect...) Flash chips in parallel. Heck, why not just design a Flash 
chip that has the multiplexer and parallel Flash sectors built right in. The 
write speed, in theory, should be able to keep up to any RAM chip. Reading 
is just the reverse using a demux.

Thomas

Haldo wrote:
> toby wrote:
> >
> > Haldo wrote:
> >
> >>Thomas Magma wrote:
> >>
> >>
> >>>No, the write speed of flash memory is not the limit of the write speed of
> >>>CompactFlash cards. Yes, each bit/byte of Flash has a write cycle limit,
> >>>however it is possible to store incoming data to a FIFO buffer then mux it
> >>>out to parallel channels of FIFO's that feed the multiple sections of Flash.

True in theory.  But think about the pin count.  This is done
internally on the flash chip, but not externally.

> >>>Then there is no write cycle limit, and the limit then falls back to the
> >>>port speed.
> >>>>
> >
> > What Thomas described was more interesting than just a buffer - it was
> > hardware capable of writing in parallel to multiply the throughput
> > (RAID-like?) The increased speed would seem to be sustainable.

The idea is already in the flash chip.  It is also the main legal issue
on the on-going case of Lexar vs. Toshiba.  The argument is whether
Toshiba came up with this simple idea (as they argued) or they learned
it from Lexar (several years ago).

> >
>
> Ok. But is this the way current compact flash memories work?

Not really.  The host is probably talking to the on-board controller
first.  The controller then feeds data to the flash chip, in 8 or 16
bits data path.  Many CFs are limited to 1.5 to 2.0 MB/s, according to
our actual experiences with them.

> 
> Greetz,Aldo


toby wrote:
> 
> Haldo wrote:
> 
>>Thomas Magma wrote:
>>
>>
>>>No, the write speed of flash memory is not the limit of the write speed of
>>>CompactFlash cards. Yes, each bit/byte of Flash has a write cycle limit,
>>>however it is possible to store incoming data to a FIFO buffer then mux it
>>>out to parallel channels of FIFO's that feed the multiple sections of Flash.
>>>Then there is no write cycle limit, and the limit then falls back to the
>>>port speed.
>>>> 
> 
> What Thomas described was more interesting than just a buffer - it was
> hardware capable of writing in parallel to multiply the throughput
> (RAID-like?) The increased speed would seem to be sustainable.
> 

Ok. But is this the way current compact flash memories work?

Greetz,Aldo


Haldo wrote:
> Thomas Magma wrote:
>
> > No, the write speed of flash memory is not the limit of the write speed of
> > CompactFlash cards. Yes, each bit/byte of Flash has a write cycle limit,
> > however it is possible to store incoming data to a FIFO buffer then mux it
> > out to parallel channels of FIFO's that feed the multiple sections of Flash.
> > Then there is no write cycle limit, and the limit then falls back to the
> > port speed.
> >
>
> Sure. You can buffer.
> But if you act this way you cannot "sustain" this speed, can you?
> Can you write 66MB/sec continously to the flash? Unless you get a FIFO
> or a SRAM buffer of the same size.... :-)

What Thomas described was more interesting than just a buffer - it was
hardware capable of writing in parallel to multiply the throughput
(RAID-like?) The increased speed would seem to be sustainable.

>
> IMHO sustained write speed are at present more or less 10MB/sec
> (according to cf makers). Maybe I'm not up to date.
>
> I was investigating on the limit for streaming continous data to a
> compact flash (or sd/mmc) device.
> 
> Bye, have a nice day!
> Aldo

Thomas Magma wrote:

> No, the write speed of flash memory is not the limit of the write speed of 
> CompactFlash cards. Yes, each bit/byte of Flash has a write cycle limit, 
> however it is possible to store incoming data to a FIFO buffer then mux it 
> out to parallel channels of FIFO's that feed the multiple sections of Flash. 
> Then there is no write cycle limit, and the limit then falls back to the 
> port speed.
> 

Sure. You can buffer.
But if you act this way you cannot "sustain" this speed, can you?
Can you write 66MB/sec continously to the flash? Unless you get a FIFO 
or a SRAM buffer of the same size.... :-)

IMHO sustained write speed are at present more or less 10MB/sec 
(according to cf makers). Maybe I'm not up to date.

I was investigating on the limit for streaming continous data to a 
compact flash (or sd/mmc) device.

Bye, have a nice day!
Aldo

"Haldo" <haldo@somewhere.net> wrote in message 
news:da368l$5ba$1@newsfeed.cineca.it...
>
>
> Thomas Magma wrote:
>> According to CompactFlash Revision 3.0 the maximum transfer speed can be 
>> up to 66MB/sec and with a DMA transfer mode.
>
> Yes, but isn't that value only the speed of the interface? Isn't the 
> physical medium (ie. the flash memory) going to be much slower than this?
>
> For sure, internal buffers or cache memories are going to be included, but 
> isn't the real limit the write speed of flash memories?
>
> Bye, Aldo
>

No, the write speed of flash memory is not the limit of the write speed of 
CompactFlash cards. Yes, each bit/byte of Flash has a write cycle limit, 
however it is possible to store incoming data to a FIFO buffer then mux it 
out to parallel channels of FIFO's that feed the multiple sections of Flash. 
Then there is no write cycle limit, and the limit then falls back to the 
port speed.

Currently, the real limits are the design costs vs. the available market.

Thomas

Thomas Magma wrote:
> According to CompactFlash Revision 3.0 the maximum transfer speed can be up 
> to 66MB/sec and with a DMA transfer mode.

Yes, but isn't that value only the speed of the interface? Isn't the 
physical medium (ie. the flash memory) going to be much slower than this?

For sure, internal buffers or cache memories are going to be included, 
but isn't the real limit the write speed of flash memories?

Bye, Aldo

According to CompactFlash Revision 3.0 the maximum transfer speed can be up 
to 66MB/sec and with a DMA transfer mode. This is great news for the future 
of Compactflash. With 16 parallel data pins and enough physical space to 
hold tera bytes of information, almost secures it to be the leader in 
high-end memory and OEM devices into the near future. Although data transfer 
speeds haven't reached this level yet, it is only because of the hardware 
design costs. Manufactures of the PCMCIA hardware interface need to update 
their hardware to support the current revision 3.0. Then, this will spawn 
the manufactures of memory cards to take advantage of these new speeds. A 
lot of people think that the read/write speed of Flash memory is a 
limitation of data transfer, however in theory, almost any speed can be 
achieved with different design layouts which include data buffers and 
massive parallel architectures.

It's not inconceivable that future revisions of the CompactFlash 
specifications will include data transfer speeds a magnitude better than the 
current standard.

Thomas


"Haldo" <haldo@somewhere.net> wrote in message 
news:d9os0g$h84$1@newsfeed.cineca.it...
> Hi all,
> in a previous thread we discussed about MMC timings and write speed.
> These memory do not seem to guarantee a minimum sustained write bandwidth.
>
> I was thinking of migrating to CompactFlash (more pins, but seem faster). 
> Producers claim a very high sustained write speed (>1MB/sec), but I'm not 
> so confident to obtain such values.
>
> Can someone, according to its experience, comment on the write performance 
> that can be obtained when a microcontroller controls a compact flash card 
> for data logging?
> (i.e. how much time do I have to wait for the flash to complete the sector 
> write after I send all the 512 bytes?)
>
> In my application I need to store about 120KB/sec, so if the whole 
> operations lasts some ms, I should be just fine!
>
>
> As usual any comment, suggestion or discussion is welcome!
>
> Thank you!Aldo


Haldo wrote:
> toby wrote:
> >
> > That's as fast as the inner loop can possibly run, doing PIO with that
> > microcontroller (PIC18F6680). Happens to be a bit slower than the
> > slowest specified ATA Mode 0 timing.
> >
>
> so, if the compact flash is slower, you have to wait for it to complete
> write cycles?

I was using hard drives and CD-ROM, but all necessary handshaking is in
the ATA standard.