42Bastian wrote:
> Bertrik Sikken schrieb:
>
>> Is there a way to make arm-elf-gcc do this?
>
> Yes, add -ffixed-r0 ... -ffixed-r7 to the CFLAGS for the FIQ code.
> I tried it with your posted code and it looks good.
>
> Though, I'd suggest to go Paul's way.

Using the -ffixed-rX compiler flags worked, thanks!

Kind regards,
Bertrik

An Engineer's Guide to the LPC2100 Series

42Bastian schrieb:
> Bertrik Sikken schrieb:
>
>> Is there a way to make arm-elf-gcc do this?
>
> Yes, add -ffixed-r0 ... -ffixed-r7 to the CFLAGS for the FIQ code.
> I tried it with your posted code and it looks good.

[update]

Tried with IAR :-) No tricks needed (just __fiq keyword).
Codesize only 100Bytes (-z9) ,gcc 132Bytes(-Os) .
--
42Bastian

Bertrik Sikken schrieb:
> Is there a way to make arm-elf-gcc do this?

Yes, add -ffixed-r0 ... -ffixed-r7 to the CFLAGS for the FIQ code.
I tried it with your posted code and it looks good.

Though, I'd suggest to go Paul's way.

--
42Bastian

Yes, I understood what you were asking, and although I don't know the
answer, I doubt very much that you can force the compiler to use different
registers.

Although I admit, it probably should have an option to do so, even by
default, for __fiq ISR's.

But anyway, one way to go about this then, is to start with your C code,
then take the assembler that the compiler generates, and use that for your
actual ISR, after you 'massage' it a bit (get rid of the register saving and
use the registers you prefer), that way you don't have to be too concerned
about all the ins and outs of assembly language (although I really recommend
to start getting your feet wet!!! A simple FIQ handler like this is the
perfect place).

~ Paul

Yes, it is short, this is my FIQ code:

The idea is that the FIQ takes data from the A/D converter and puts it
in a circular byte buffer, setting a flag in case the buffer overflows.
Variables ulReadPtr, ulWritePtr, fOverflow are volatile.
QUEUE_SIZE is 16384, so the % operation is cheap.

Strictly speaking, my question was about convincing the compiler to
be more smart about what registers to use. I'm not so comfortable with
assembly yet, but maybe this isn't too hard.

Kind regards,
Bertrik

Write your FIQ ISR in assembler!

It's short anyway, right? ;-)

~ Paul Claessen

Hi all,

For a project using a LPC2148 I need my FIQ to be as fast as possible.
When I look at the FIQ interrupt handler generated by arm-elf-gcc I see
that it saves r0-r3 on the stack (and restores them later):
400006ac: e92d000f stmdb sp!, {r0, r1, r2, r3}
...
40000710: e8bd000f ldmia sp!, {r0, r1, r2, r3}

As far as I understand from the arm7tdmi manual, registers r8-r14 are
banked in FIQ mode, meaning that they can be used without disturbing
the non-interrupt mode registers r8-r14. I think using r8-r11 instead
of r0-r3 could shave off some time in the FIQ interrupt (because
they don't need a time-consuming store/restore).

Is there a way to make arm-elf-gcc do this?

Kind regards,
Bertrik